VBAT
EN_SHIPMODE
VIN
/MR
SHIPMODE
t
WAKE2
Figure 9-13. Ship Mode Entry Based On EN_SHIPMODE bit
9.4.2 Low Power
Low Power mode is a low quiescent current state while operating from the battery. The device will operate in low
power mode when the LP pin is set low, V
IN
< V
UVLO
, MR pin is high and all I
2
C transactions and interrupts that
started while in the Active Battery or Charging Modes have been completed and sent. During LP mode the VDD
output is powered by BAT, the MR inputs are active and the I
2
C and ADC are disabled. All other circuits, such as
oscillators, are in a low power or off state. The LS/LDO outputs will remain in the state set by the EN_LS_LDO
bit prior to entering Low Power Mode. The device exits LP Mode when the LP pin is set high or V
IN
> V
UVLO
.
In the case that a faulty adapter with V
IN
> V
OVP
is connected to the device while LP pin is low, the device will be
powered from the battery, but will operate in Active battery mode instead of Low Power mode regardless of the
LP pin state.
When MR is held low while LP is low, the device will enter Active Battery Mode, this allows for the internal clocks
of the device to be running and allow the MR long button press HW reset. I
2
C operation is also possible during
this condition. Note that as soon as the MR input is released and goes high, the device will go back to LP Mode
tuning off all clocks. Note that if a HW reset has occurred while LP is low, MR must remain low until the power
cycle has completed (PMID and LDO enable) to allow completion of the power up sequence.
9.4.3 Active Battery
When the device is out of Ship Mode and battery is above V
BATUVLO
with no valid input source, the battery
discharge FET is turned on connecting PMID to the battery. The current flowing from BAT to PMID is not
regulated, but it is monitored by the battery over-current protection (OCP) circuitry. If the battery discharge
current exceed the OCP threshold, the battery discharge FET will be turned off as detailed in the
If only battery is connected and the battery voltage goes below V
BATUVLO
, the battery discharge FET is turned
off. To provide designers the most flexibility in optimizing their system, an adjustable BATUVLO is provided.
Deeper discharge of the battery enables longer times between charging, but may shorten the battery life. The
BATUVLO is adjustable with a fixed 150-mV hysteresis.
9.4.4 Charger/Adapter Mode
This mode is active when V
IN
> V
UVLO
. In this mode the ADC is enabled and continuously running conversions
on all channels. If the supply at IN is valid and above the V
IN_DPM
level, PMID will be powered by the supply
connected to IN. The device will charge the battery, if charging is enabled, until termination has occurred.
SLUSEC5 – DECEMBER 2020
36
Copyright © 2020 Texas Instruments Incorporated
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