Tews Technologies TPMC810, Руководство пользователя

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TPMC810 User Manual Issue 2.0.0 Page 11 of 22
4.4 Local Configuration Register (LCR)
The PCI base address for the PCI Controller Configuration Registers is PCI Base Address 0
(PCI Memory Space, Offset 0x10 in the PCI Configuration Space) or PCI Base Address 1 (PCI
I/O Space, Offset 0x14 in the PCI Configuration Space).
Do not change hardware dependent bit settings in the PCI Controller Configuration Registers.
Offset from
PCI Base
Address
Register Value Description
0x00 Local Address Space 0 Range 0x0FFF_FE00 CAN Controller
Address Space
0x04 Local Address Space 1 Range 0x0000_0000 N/A
0x08 Local Address Space 2 Range 0x0000_0000 N/A
0x0C Local Address Space 3 Range 0x0000_0000 N/A
0x10 Expansion ROM Range 0x0000_0000
0x14 Local Address Space 0 Local Base Address (Remap) 0x0000_0001
0x18 Local Address Space 0 Local Base Address (Remap) 0x0000_0000
0x1C Local Address Space 0 Local Base Address (Remap) 0x0000_0000
0x20 Local Address Space 0 Local Base Address (Remap) 0x0000_0000
0x24 Expansion ROM Local Base Address (Remap) 0x0000_0000
0x28 Local Address Space 0 Bus Region Descriptor 0x1502_4120
0x2C Local Address Space 1 Bus Region Descriptor 0x0000_0000
0x30 Local Address Space 2 Bus Region Descriptor 0x0000_0000
0x34 Local Address Space 3 Bus Region Descriptor 0x0000_0000
0x38 Local Exp. ROM Descriptor 0x0000_0000
0x3C Chip Select 0 Base Address 0x0000_0081
0x40 Chip Select 1 Base Address 0x0000_0181
0x44 Chip Select 2 Base Address 0x0000_0000
0x48 Chip Select 3 Base Address 0x0000_0000
0x4C Interrupt Control/Status 0x0041
0x4E EEPROM Write Protect Boundary 0x0030
0x50 Miscellaneous Control Register 0x0078_0040
0x54 General Purpose I/O Control 0x0224_96D0
0x70 Hidden1 Power Management data select 0x0000_0000
0x74 Hidden 2 Power Management data scale 0x0000_0000
Table 4-4 : PCI Controller Configuration Register Map