Terasic Apollo Carrier Board, Руководство пользователя

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Apollo Carrier Board
User Manual 28 www.terasic.com
September 22, 2020
Chapter 5
PCI Express Reference
Design for Windows
CI Express is commonly used in consumer, server, and industrial applications, to link
motherboard-mounted peripherals. From this demonstration, it will show how the PC
Windows and FPGA communicate with each other through the PCI Express interface. Stratix
10 Hard IP for PCI Express with Avalon-MM DMA IP is used in this demonstration. For detail
about this IP, please refer to Intel document ug_s10_pcie_avmm.pdf
.
Note, before user start to use
the PCIe design with the Apollo Develop kit, please refer to the section 4.3 to setup Thunderbolt 3
connection first .
5.1 PCI Express System Infrastructure
Figure 5-1 shows the infrastructure of the PCI Express System in this demonstration. It consists of
two primary components: FPGA System and PC System. The FPGA System is developed based on
Stratix 10 Hard IP for PCI Express with Avalon-MM DMA. The application software on the PC side is
developed by Terasic based on Altera’s PCIe kernel mode driver.
Figure 5-1 Infrastructure of PCI Express System
P