SL876Q5-A
Product User Guide
1VV0301333 Rev. 2
Page 46 of 68
2017-06-27
Please refer to
Section 8 Electrical Interface
for important details for each pin.
Along with power and ground, the signals required to operate the module properly are: an
external antenna RF input (optional), a UART TX/RX pair, and several control lines as
described below.
The power supply must have tight voltage regulation under varying line and load conditions to
prevent falsely tripping the internal voltage supervisor within the module. See
Section 8.4
for details of requirements for the power supply.
Due to the very small size of the built-in chip antenna, a proper ground plane is critical to
achieving good performance. Please refer to
Figure 12-1 SL876Q5-A Ground Plane
for
requirements.
An optional active GNSS antenna can be connected through C1 (which is used to block DC
voltage) to the External_Ant_RF_Input pin. The reference design shows a DC power feed for
the external antenna’s LNA which is controlled by the state of the module (operating vs. low
power) on the LNA_ENABLE pin. The inductor L1 is chosen to be self-resonant at the GPS L1
frequency (1.57542 GHz) to minimize loading on the RF trace. Capacitor C3
is also chosen to
be self-resonant to provide a near short at that RF frequency. The internal chip antenna is
enabled by grounding the INT/nEXT_Ant_En pin through JP3.
The TX/RX serial port can be configured for UART, I
2
C, or SPI interface using GPIO 6 and 7.
As shown, GPIO7 is floating and resistor R4 pulls GPIO6 high, which specifies the host port
configuration to be UART. See
Section 8.8 Host I/O Ports - Configuration and Operation
for details.
TX and RX are a standard serial UART port with a default bit rate of 9600 bps, 8 data bits, 1
stop bit, and no parity. As is the case with all UART data, the idle state is logic one.
TX is a 1.8 V logic level signal. RX is tolerant to 3.6 VDC.
ON-OFF is an input to control the power state of the module. After power-up, the module will
enter the RUN state if it is high, or the HIBERNATE state if it is low. The SYSTEM- ON output
pin indicates the system’s state.
Note:
ON-OFF must not be tied to 1V8 or the module will not be able to exit a commanded
HIBERNATE state.
nRESET (active low) will cause the module to be reset and then resume operation when
released. It is desirable to bring this pin out to a test point if not otherwise connected.
BOOT is used to configure the boot source. It is desirable to bring this pin out to a test point.
SYSTEM-ON is a 1.8V output indicating the power state of the module. If the module is in the
RUN state, the logic level will be high, otherwise the logic level will be low.
PPS is a one pulse per second time mark output pulse. It may be left unconnected.
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