Telit Wireless Solutions GL865 V3, Руководство пользователя

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HW User Guide
1vv0301018 Rev. 15 Page 32 of 72 2019-01-07
PCB Design Guidelines
This section explains the suggested design for the transmission line on the customer’s
application board.
7.2.1. Transmission line design
During the design of the GL865 V3/V3.1 interface board (see the Telit EVK2 User Guide,
1vv0300704), the placement of components has been chosen properly, in order to keep the
line length as short as possible, thus leading to lowest power losses possible. A Grounded
Coplanar Waveguide (G-CPW) line has been chosen, since this kind of transmission line
ensures good impedance control and can be implemented in an outer PCB layer as needed
in this case. A SMA female connector has been used to feed the line.
The interface board is realized on a FR4, 4-layers PCB. Substrate material is characterized
by relative permittivity ε r = 4.6 ± 0.4 @ 1 GHz, TanD= 0.019 ÷ 0.026 @ 1 GHz.
A characteristic impedance of nearly 50 Ω is achieved using trace width = 1.1 mm, clearance
from coplanar ground plane = 0.3 mm each side. The line uses reference ground plane on
layer 3, while copper is removed from layer 2 underneath the line. Height of trace above
ground plane is 1.335 mm. Calculated characteristic impedance is 51.6 Ω, estimated line
loss is less than 0.1 dB. The line geometry shown below is just an example and the values
may change according to the specific PCB design on the customer’s application board:
NOTE:
Please refer to Telit modem integration design guide 1VV0301189 for
further details.