
Teledyne LeCroy
PCI Express Mid-Bus Probe for Summit Analyzers
Version 1.1
17
4.5 Pin Assignments for x4 Lane Widths
For x4 lane widths, a half-size header can be used. The diagram below shows the recommended pin assignments for x4
configurations (keep in mind that any of modifications mentioned in Section 4.2 can be applied.
x4 (Bi-directional) Mid-Bus Probe Pinout
on a Half-size Header
Pin
Signal Name
Pin
Signal Name
G1
GND (Gen2 only)
2
GND
1
C0p- Upstream
4
C0p- Downstream
3
C0n- Upstream
6
C0n- Downstream
5
GND
8
GND
7
C1p- Upstream
10
C1p- Downstream
9
C1n- Upstream
12
C1n- Downstream 11
GND
14
GND
13
C2p- Upstream
16
C2p- Downstream 15
C2n- Upstream
18
C2n- Downstream 17
GND
20
GND
19
C3p- Upstream
22
C3p- Downstream 21
C3n- Upstream
24
C3n- Downstream 23
GND
G2
GND (Gen2 only)