Teledyne Lecroy PCI Express 2.0 Mid-Bus Probe, Инструкция по установке и эксплуатации, Страница: 12 / 29

Teledyne LeCroy PCI Express Mid-Bus Probe for Summit Analyzers Version 1.1
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3.5 Reference Clock Probe Attachment
Should SSC clocking be used in the system under test or if the link varies the bit rate by more than 300ppm, a reference
clock tap may be required. The connection from the reference clock to the analyzer is a 3-
pin header (1 by 3, 0.050”
center spacing) which is placed on the clock signal transmission line of the DUT. The PE014UCA-X Reference Clock
Cable provides a three-pin micro socket that connects from this header to the CLK IN port on the Mid-Bus Pod.
If the reference clock is sampled by tapping off an existing clock, the header shall be located on the existing clock
transmission line, where a high impedance clock probe from the mid-bus probe is connected with no significant loading
effects. In the case of a dedicated clock, the header shall be located at the end of a dedicated clock transmission line
without termination, where a 50-Ohm cable is connected and the termination for the clock signal is provided on the mid-
bus probe board.
The connectivity of the clock header pins follows the following table:
Signal Pin Number
REFCLKp 1 (or 3)
Unused 2
REFCLKn 3 (or 1)
Note that the analyzer is not sensitive to the polarity of the reference clock. Therefore, the probe can be plugged onto the
pin header in either orientation.
The following 3-pin header can be used for the reference clock:
Samtec Part No: TMS-103 (Vertical Orientation)