
Index
Index–2
TMS 540 PowerPC 60X Microprocessor Support Instruction Manual
demonstration file, 2–18
dimensions, probe adapter, 3–2
disassembled data
Address cycle types, 2–8
ARTRY, DRTRY, and Data Error cycle types, 2–10
Data cycle types, 2–9
Direct Store Access cycle types, 2–9
general cycle type definitions, 2–10
viewing, 2–7
viewing an example, 2–18
disassembler
definition, xi
logic analyzer configuration, 1–2
setup, 2–1
Disassembly Format Definition overlay, 2–13
Disassembly property page, 2–13
display formats
Control Flow, 2–12
Hardware, 2–8
Software, 2–12
special characters, 2–7
Subroutine, 2–12
DRTRY Cycles
clocking option, 2–2
how data is acquired, 3–15
E
electrical specifications, 3–1
environmental specifications, 3–1
Exception Byte Ord field, 2–14
exception labels, 2–17
Exception Prefix field, 2–14
F
fuse, replacing, 4–1
H
Hardware display format, 2–8
Address cycle types, 2–8
ARTRY, DRTRY, and Data Error cycle types, 2–10
Data cycle types, 2–9
Direct Store Access cycle types, 2–9
general cycle type definitions, 2–10
Hi_Data group
channel assignments, 3–6
display column, 2–12
high-density probe, connecting channels to, 1–9
I
installing hardware. See connections
J
Joined Address and Data, 2–2
L
leads (podlets), high-density probe. See connections
Little-Endian byte order, 2–14
Lo_Data group
channel assignments, 3–7
display column, 2–12
logic analyzer
configuration for disassembler, 1–2
software compatibility, 1–2
M
manual
conventions, xi
how to use the set, xi
Mark Cycle function, 2–15
Mark Opcode function, 2–15
marking cycles, definition of, 2–15
microprocessor
package types supported, 1–1
signals not accessible on probe adpter, 3–15
specific clocking and how data is acquired, 3–13
microprocessor signal names, pin number on socket on
probe adapter, 3–16
grid row and column labels, 3–23
Misc group, channel assignments, 3–9
Mnemonics display column, 2–12
MPC601 microprocessor, connection procedure, 1–4
MPC603 microprocessor, connection procedure, 1–4
MPC604 microprocessor support, application setup and
disassembler only, 1–3
P
PGA socket on probe adapter
grid row and column labels, 3–23
microprocessor signal names, 3–16
pipelining address, 1–3