
Acquiring and Viewing Disassembled Data
2–14
TMS 540 PowerPC 60X Microprocessor Support Instruction Manual
You can use either 64-bit configuration when your SUT is operating in 64–bit
mode. This is the default bus configuration.
You can also use either 32-Bit Data Bus configuration when your SUT is
operating in 32-bit mode. With this configuration, only the Hi_Data channels
corresponding to the DH31-DH0 signals are valid.
You can also select which PPC60X microprocessor to trace: MPC0 or MPC1.
The MPC0 is considered to be the microprocessor from which the BG* and
DBG* signals are acquired. All other microprocessors, including controllers, are
considered to be MPC1s.
Prefetch Byte Ord.
You can select the byte ordering for the predominant instruc-
tion fetches as Big- or Little-Endian.
Alt Byte Ord - Lo Bound and Alt Byte Ord - Hi Bound.
You can enter the low and
high bounds for the alternate byte ordering range. The default is 00000000.
You should enter alternate values on double-word boundaries. If the value is not
on a double-word boundary, the disassembler assumes the value to be the nearest
double-word.
If you do not enter a value in the field, the data is acquired and disassembled
according to the selection in the Prefetch Byte Ord field.
NOTE
. The alternate high bound value must be greater than the alternate low
bound value or disassembly will be incorrect.
Exception Byte Ord.
You can select the byte ordering for exception processing as
Big- or Little-Endian.
Exception Prefix.
You can enter the prefix value of the exception table as 000 to
FFF. The default prefix value is FFF. The exception table must reside in external
memory for interrupt and exception cycles to be visible to the disassembler.
NOTE
. If an address is in the Exception processing region and in the range
selected for the alternate byte ordering, the disassembler uses the byte ordering
selected for the Exception processing.