Tekram Technology P6L40-A4E, Руководство пользователя

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MAINBOARD BIOS SETUP MAINBOARD BIOS SETUP
P6L40- P6L40-A A4 4E E User’s Manual User’s Manual
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Video BIOS Cacheable - When Enabled , C0000h to C7FFH become cacheable memory.
Video RAM Cacheable - Enabled will cause access to the video RAM addressed at
B0000H to BFFFH to be cacheable and also let the A0000H to AFFFFH to be a UC memory
type. *
Disabled is the default.
8 Bit I/O Recovery Time - The recovery time is the length of time, measured in ISA BUS
clocks, that the system will delay after the completion of an input/output request. This delay
takes place because the CPU is operating faster than the input/output bus. Therefore the
CPU must be delayed to allow for the completion of I/O transfers. This item allows you to
determine the recovery time allowed for 8 bit I/O. Choices are from NA, 1 to 8 ISA BUS
clocks. *
1 is the default.
16 Bit I/O Recovery Time - This item allows you to determine the recovery time allowed
for 16 bit I/O. Choices are from NA, 1 to 4 ISA BUS clocks. * 1 is the default.
Memory Hole At 15M-16M - In order to improve compatibility, certain space in memory
can be reserved for old style ISA cards that map memory between 15M-16M. Do not enable
this feature unless you use the old style ISA card, otherwise the memory size may be
reduced to 15 MB for some O.S. *
Disabled is the default.
Passive Release - The PIIX4 provides a programmable Passive Release mechanism to meet
the required master latencies. When enabled (default), ISA masters may see long delays in
access to any PCI memory, including the main DRAM array.
Delayed Transaction - When enabled, the delay transaction mechanism will be in effect
when PIIX4 is the target of a PCI transaction. Disabled is the default.
AGP Aperture Size (MB) - Options are 4, 8, 16, 32, 64 (default), 128 and 256 MB.
SDRAM RAS# To CAS# Delay - This option allows you to determine the delay time
between the assertion of RAS# To CAS#. Options are slow and fast (default). This has no
impact on page hit cases and affects only row and page misses.
SDRAM RAS Precharge Time - DRAM must continually be refreshed or it will lose its
data. Normally, DRAM is refreshed entirely as the result of a single request. This option
allows you to determine the timing for the
R ow A ddress S trobe to accumulate its charge
before the DRAM is refreshed. If insufficient time is allowed, refresh may be incomplete
and data will be lost. Options are
slow and fast (default).
SDRAM CAS Latency Time - This item allows you to select the CAS# latency for all
SDRAM cycles. Options are 3 or 2 Clocks. *Default = 2 Clocks .
CPU Overheat Alarm (>65
°°
C) - When Enabled , once the CPU temperature exceeds 65
°
C, a warning will be issued via the speaker and the operating CPU speed will be slowed
down to ease the situation.