TS-7300 MANUAL
CONNECTORS AND HEADERS
5 CONNECTORS AND HEADERS
5.1 10/100 Base-T Ethernet Connector
The EP9302 Ethernet LAN controller incorporates all the logic needed to interface directly
to any MII compatible Ethernet PHY chip. A low-power Micrel KS8721 chip is used to
implement the Ethernet PHY function and an integrated RJ-45 connector with built-in
10/100 transformer and LED indicators completes the Ethernet sub-system.
The
TS-7300
has both a LINK/ACTIVITY LED and a 10/100 speed LED built into each RJ-
45 connector that indicates the current Ethernet status. The LINK LED (left side of
connector, green) is active when a valid Ethernet link is detected. This LED should be ON
whenever the
TS-7300
is powered and properly connected to a 10/100BaseT Ethernet
network. The LINK/ACTIVITY LED will blink to indicate network activity for either inbound
or outbound data. The SPEED LED (right side of connector, amber) will be on when a
100Mb network is detected and off for a 10Mb network. Both of these LEDs are controlled
by the KS8721 and do not require any overhead by the processor.
The Ethernet PHY chip can be powered down, under software control, to save
approximately 90 mA of current consumption. This is controlled by the EP9302 Digital
output on Port H, bit 2. A logic zero will power down the KS8721 PHY interface.
Note
TS-Kernel provides all the software support to use the EP9302 10/100 Ethernet
core. For more details, find the TCP/IP configuration instructions on the Linux
documentation.
5.2 Second 10/100 Base-T Ethernet Connector
The default TS-BITSTREAM core for the
TS-7300
on-board FPGA implements an
adaptation of the OpenMAC core from OpenCores.org. This makes available a second
10/100 base-t ethernet port on the
TS-7300
. As the default EP9302 ethernet LAN
controller, a low-power Micrel KS8721 chip is used to implement the Ethernet PHY
function and an integrated RJ-45 connector with built-in 10/100 transformer and LED
indicators completes the Ethernet sub-system.
The second ethernet is about 15%-20% slower than the default high-speed MAC core
inside the EP9302 system-on-chip. The physical memory location of the OpenMAC core is
0x7210_0000
. The following is a basic memory map for the OpenMAC, which uses 32-bit
registers:
Table: OpenMAC Memory Map
I/O Address
Length
Description
0x7210_0000
0x2000
RAM for Ethernet Packets
0x7210_2000
0x400
OpenMAC core 32-bit registers
0x7210_2400
0x400
Ethernet Buffer Descriptors memory
Note
The TS-Kernel provides all the software support to use the OpenMAC 10/100
Ethernet core. The driver is named open_eth. For further information on the
OpenMAC core such as the registers description, find the specific documentation
at
www.opencores.org
website.
© Apr, 2010 www.embeddedARM.com 31