EDM1-IMX6 HARDWARE MANUAL
– VER 1.00 – NOV 14 2019
Page
47
of
80
3.10. General Purpose Memory Controller Bus (Local Bus)
The EDM1-IMX6 features a general-purpose media interface which is connected to the NXP i.MX6 GPMI
controller.
The general-purpose media interface has several features to efficiently support NAND:
•
Individual chip select pins and ganged ready/busy pin for up to four NANDs.
•
Individual state machine and DMA channel for each chip select.
•
Special command modes work with DMA controller to perform all normal NAND functions without
CPU intervention.
•
Configurable timing based on a dedicated clock allows optimal balance of high NAND
performance and low system power.
GPMI and DMA have been designed to handle complex multi-page operations without CPU intervention.
The DMA uses a linked descriptor function with branching capability to automatically handle all of the
operations needed to read/write multiple pages:
•
Data/Register Read/Write-The GPMI can be programmed to read or write multiple cycles to the
NAND address, command or data registers.
•
Wait for NAND Ready-The GPMI's Wait-for-Ready mode can monitor the ready/ busy signal of a
single NAND flash and signal the DMA when the device has become ready. It also has a time-out
counter and can indicate to the DMA that a time-out error has occurred. The DMAs can
conditionally branch to a different descriptor in the case of an error.
•
Check Status-The Read-and-Compare mode allows the GPMI to check NAND status against a
reference. If an error is found, the GPMI can instruct the DMA to branch to an alternate
descriptor, which attempts to fix the problem or asserts a CPU IRQ.
For additional de
tails, please refer to the “General Purpose Media Interface (GPMI)” chapter of the “i.MX6
Reference Manual”.
