Service Manual
TANDY 6000/6000-HD
TANDY COMPUTER PRODUCTS ------------------------------------------------------------------------
Interrupt Request Inputs
Table 7-1 lists, in order from the highest to the lowest
priority, the interrupt inputs implemented in the MC68000
subsystem.
For more information, see the AM9519 data sheet section in
the AM9500 Peripheral Products Guide published by Advanced
Micro Devices.
7.2.3
Z80A to MC68000 Memory Interface Circuitry
Communication between the two CPUs is accomplished with the
Z80A CPU initiating interrupts to the M368000, indicating
I/O completion, etc.
The Z80A CPU can periodically poll an
MC68000 memory location to recognize requests for service
from the MC68000.
Optionally, the MC68000 can generate an interrupt to the
Z80A by accessing a decoded MC68000 memory location (not
available on Model 11/16 upgrades).
Once a request for
service has been recognized by the Z80A CPU, a descriptor
block is read into Z80A memory from MC68000 memory to
determine the specific service required.
- 66 -
Bit Number
Option
0
Priority Mode
1
Vector Selection
2
Interrupt Mode
3
GINT Polarity
4
IREQ Polarity
5
Selects internal register to be read on
subsequent read operation
6
Selects internal register to be read on
subsequent read operation
7
Master mask bit that enables or dis
ables all interrupts without
modifying the interrupt mask
register
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