Surface Concept Delayline DLD 8080, Руководство пользователя

Страница: 35 / 36

35
DLD8080 R4.30 & R4.31 Manual
Figure 1: 0/0 position of the DLD image (black dot). ................................................................................................................................................ 9
Figure 2: Connection scheme of the Delayline Detector and readout package. ......................................................................................... 10
Figure 3: Schematic sketch on voltage ramping during “Start-Up” procedure. ............................................................................................ 13
Figure 4: Example for DLD image of accumulated dark counts. .......................................................................................................................... 14
Figure 5: Schematic sketch on voltage ramping with external reference voltage. ....................................................................................... 17
Figure 6: Principle of the 3D (x, y, t) delayline operation. ........................................................................................................................................ 19
Figure 7: Example of a) a partial overload and b) a heavy (global) overload... ................................................................................................ 22
Figure 8: Example of a) an overvoltage on the MCPs and b) an undervoltage at high count rates... ..................................................... 22
Figure 9: Schematic orientation and naming of delaylines and DLD image . .. ................................................................................................ 24
Figure 10: Connection ports of the DLD8080 R4.30 & R4.31. ................................................................................................................................ 25
Figure 11: Internal connection of high voltage potentials (schematic). ............................................................................................................ 25
Figure 12: Layout of ACU 3.4.2. ......................................................................................................................................................................................... 26
Figure 13: Labeling of discriminator threshold and amplification regulators. ................................................................................................ 27
Figure 14: Typical gain degradation of MCPs as function of the extracted output charge. ....................................................................... 29
Figure 15: Schematic plot of increasing the operation voltage to compensate gain degradation over time as function of the
extracted charge (all values are only exemplary). ...................................................................................................................................................... 30
Figure 16: Example of MCP curve. ................................................................................................................................................................................... 31
11 List of Figure
DLD8080 R4.30 & R4.31 Manual | Surface Concept GmbH