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Chapter 4: BIOS
4-23
CPU Latency Timer
This option allows the CPU Latency Timer to be modified.
T
he settings for
this option are "Disabled" and "Enabled." Disabled: The deferrable proces-
sor cycle will be deferred immediately after receiving another ADS#. En-
abled: The deferrable processor cycle will only be deferred after it has
been in a “Snoop Stall” for 31 clocks and another ADS# has arrived.
C000, 16k Shadow
C400, 16k Shadow
C800, 16k Shadow
CC00, 16k Shadow
D000, 16k Shadow
D400, 16k Shadow
D800, 16k Shadow
DC00, 16k Shadow
These options specify how the 16 KB of video ROM at each of the above
addresses is treated. The settings are "Disabled", "Enabled", and "Cached/
WP." When Disabled, the contents of the video ROM are not copied to RAM.
When Enabled, the contents of 16 KB of video ROM beginning at the above
address are copied (shadowed) from ROM to RAM for faster application.
When set to Cached/WP, the contents of 16 KB of video ROM beginning at
the above address are copied (shadowed) from ROM to RAM and can be