Supero Super 370SCD, Руководство пользователя и BIOS

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Chapter 1: Introduction
1-19
Introduction
Dimensions
• SUPER PIIISCA - ATX: 11.6" x 8.825" (295 x 224 mm)
• SUPER PIIISCD - ATX: 11.6" x 8.225" (295 x 209 mm)
• SUPER PIIISCE - ATX: 11.6" x 7.2" (295 x 183 mm)
• SUPER 370SCD - ATX: 12" x 7.8" (305 x 198 mm)
1-2 Chipset Overview
Intel's 820 chipset brings advanced technology to the performance PC plat-
form. A 133 MHz front side bus speed, 4xAGP, RDRAM and increased I/O
performance are some of the new capabilities offered by the 820. The main
bridge of the 820 is the Memory Controller Hub (MCH), which enables a 133
or 100 MHz front side bus speed. An I/O Controller Hub (ICH) integrates PCI
peripherals and I/O functions with a dedicated 33 MHz PCI bus. An accel-
erated hub interface provides a 266 MB/sec bandwidth between the MCH
and ICH and also separates the I/O devices from the MCH for improved
performance.
Memory Controller Hub (MCH)
The MCH consists of the host (CPU) interface, DRAM interface, I/O interface
and AGP interface for the 820 chipset. It supports ECC memory for RDRAM.
The AGP 2.0 interface supports 4x data transfer and 4x fast write capabil-
ity. The MCH host interface bus runs at 133/100 MHz.
I/O Controller Hub (ICH)
The ICH is the I/O Controller Hub for the I/O subsystem, which integrates
many of the functions required by today's PC platforms. It provides the
interface to the PCI Bus and communicates with the MCH over a dedicated
hub interface.
Memory Translator Hub (MTH)
The Memory Translator Hub allows the PIIISCA/PIIISCD/370SCD to support
DIMM (SDRAM) type memory. Note for the PIIISCA: Only one type of
memory can be used; if RIMM(s) are installed, then any installed DIMM(s)
will be disabled. The MTH does not support ECC, meaning that the use of
ECC memory will result in non-ECC operation.