Supermicro X11QPH+, Руководство пользователя

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Chapter 2: Installation
1. Power-Failure Throttling
Enable
Power-Failure Throttling Enable/Disable
The Power-Failure Throttling jumper is located at J17. Close pins 1-2 of J17 to enable power
throttling feature. The default setting is the close pins 2-3 for normal operation. See the jumper
setting table below.
Power-Failure Throttling
Jumper Settings
Jumper Setting De fi nition
Pins 1-2 Enabled
Pins 2-3 Normal
BIOS
LICENSE
IPMI CODE
BAR CODE
REV.1.01
S-SA
TA
5
S-SA
TA
4
JPWR4
JPWR1
JPWR2
JPWR3
JTPM1
P4_DIMMB2 P4_DIMMA2
P3_DIMMF2
P1_DIMME2 P1_DIMMD2
P4_DIMMB1 P4_DIMMA1
P1_DIMME1 P1_DIMMD1
JPWR5
JPWR6
JPWR7
JUSB1
JSD1 JSD2
JUIDB1
JBAT1
J22
J18
LED1
LED2
JITP1
FA
N
10
FA
N
9
FA
N
8
FAN6
FA
N
7
FAN5
FA
N
4
FA
N
2
FA
N
3
FA
N
1
JPCIE1
J21
J24 J25
J20
J23
J19
JUSB3
J26
J27
J17
JPG1
JWD1
JPME1
JL1
JBT1
JRK1
JUSB2
BMC_HB
_LED1
JF1
JSTBY1
P3_DIMMF1
P3_DIMMD2 P3_DIMMD1 P3_DIMME2 P3_DIMME1
P2_DIMMA2 P2_DIMMA1 P2_DIMMB2 P2_DIMMB1 P2_DIMMC2 P2_DIMMC1
P2_DIMMD2 P2_DIMMD1
P2_DIMME2 P2_DIMME1
P2_DIMMF2 P2_DIMMF1
P1_DIMMF2 P1_DIMMF1
P4_DIMMC2 P4_DIMMC1
P4_DIMME1 P4_DIMMF1 P4_DIMME2
P4_DIMMF2
P4_DIMMD1 P4_DIMMD2 P3_DIMMB2 P3_DIMMA2 P3_DIMMB1 P3_DIMMA1 P3_DIMMC2 P3_DIMMC1
BIOS
XX
J29
J30
PCH
BMC
CPU2_POR
T3
CPLD
CPU2
SXB1C
CPU3
CPU4
SXB2
SXB1B
SXB1A
SXB4A
SXB4B
USB0/1
CPU1_POR
T2
SXB3C
CPU1_POR
T1
SXB3B
VGA
UID
COM1
I-SATA0~3 S-SATA0~3
I-SATA4~7
USB 4(3.0)
USB 2/3(3.0)
IPMI_LAN
CPU2_POR
T2
CPU2_POR
T1
CPU1
BACKPLANE POWER
GPU POWER
P1_DIMMB1 P1_DIMMC1 P1_DIMMB2 P1_DIMMC2 P1_DIMMA1 P1_DIMMA2
WIO 2x16 (PCI-E 3.0)
PCI-E 3.0 (RSC -56 Lanes)
PCI-E 3.0 (RSC -48 Lanes)
Ultra IO X40
PSU2 PSU1
J12VSB
SXB5B
SXB5A
CPU2_POR
T3
CPU3_POR
T2
CPU3_POR
T3
CPU3_POR
T1
CPU4_POR
T2
CPU4_POR
T1
CPU4_POR
T3
CPU1_POR
T3
SXB3A
WIO X8 (PCI-E 3.0)
1