Supermicro X11DGO-T, Руководство пользователя

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Super X11DGO-T User's Manual
Connector Description
CN10-17
Oculink connectors used to connect PCI-E buses from processors to PCI-E slots or NVMe
backplanes (via x8 to x4 Y cables) (
Note : Y cables are needed to connect NVMe backplanes)
CN10
Oculink connector supported by CPU1 PCI-E Port 3 [7:0] and used as CPU1 Master Port for
NVMe side band connections
CN11 Oculink connector supported by CPU1 PCI-E Port 3 [15:8]
CN12 Oculink connector supported by Slot1 PCI-E [7:0]
CN13 Oculink connector supported by Slot1 PCI-E [15:8]
CN14
Oculink connector supported by CPU2 PCI-E Port 3 [7:0] and used as CPU2 Master Port for
NVMe side band connections
CN15 Oculink connector supported by CPU2 PCI-E Port 3 [15:8]
CN16 Oculink connector supported by Slot2 PCI-E [7:0]
CN17 Oculink connector supported by Slot2 PCI-E [15:8]
Note : Both JPCIE1 and JPCIE2 are lane reversal, which means that CPU PCE-E lane
[15] is connected to PCE-E lane[0], the fi rst lane of the slots.
CN Connectors (CN10-17)
CN connectors are used to connect PCI buses from processors to PCI-E slots using Oculink
x8 or x8 to x4 Y cables. Refer the table and the diagram below for details on onboard CN
connectors.
IPMI CODE
SAN MAC
MAC CODE
BAR CODE
BIOS
LICENSE BMC
LED1
LED2
JPME1
JWD1
JTPM1
JSDCARD1
JM2-1 JM2-2
BT1
JRK1
LEDM1
HDD_LED1
JPW1
1
JPW12
JPW13
FA
N
2
FAN1
JLAN1
JPCIE1
JPCIE2
JSATA1
JUSB1
PWR_SW1
SW2 SW1
JP2
BIOS
X11DGO-T
REV:1.00
LEDBMC
CPU2 SLOT2 PCI-E 3.0 X16
M.2-H2
RAID KEY
-1
CPU1 SLOT1 PCI-E 3.0 X16
PWR_BUTT
O
N
RESET_BUTT
O
N
JBT1
LAN1/LAN2
SD CARD M.2-H1
USB0(3.0)
I-SATA4~7 I-SATA0~3
BMC_BUTT
ON
COM1
VGA
IPMI_LAN
USB1/2(3.0)
BATTERY
PCH
LAN CTRL
(
(CPU2 CN1)
)
CN1) CN2) (CPU1 (CPU1
CN12
CN16
CN13
CN17
CN10
CN11
CN14
CN15
J
JBMC_BTN1
1
9
8
7
6
5
4
3
2
10
1. CN10
2. CN11
3. CN12
4. CN13
5. CN14
6. CN15
7. CN16
8. CN17
9. CPU1 Slot1
10. CPU2 Slot2