2-26
X10SRG-F Motherboard User’s Manual
X10SRG-F
REV:1.01
DESIGNED IN USA
BIOS
LICENSE
MAC CODE
IPMI CODE
BAR CODE
4
1
JVRM2
JVRM1
Intel C610
BMC
i350
JUIDB1
FA
ND
FA
N4
FA
N3
FA
N2
FA
N1
FA
NC
FA
NA
FA
NB
JTPM1
JL
1
JOH1
LE2
LE1
LEDM1
S-SA
TA
3
S-SA
TA
2
S-SA
TA
1
S-SA
TA
0
I-SA
TA
4
I-SA
TA
3
I-SA
TA
5
I-SA
TA
2I
-SA
TA
1
I-SA
TA
0
JSTBY1
JPCIE
2
JPCIE
3
JSD
1
JSD
2
JPW3
JPW2
JPW
1
I-SGPIO2
I-SGPIO1
S-SGPI
O
JIPMB1
JP3
JD
1
JPI2C1
JPL1
JPB1
JI2C2
JWD1 JPME2
JI2C1
JBRSET1
JBR
1
JPL_LAN1 JPL_LAN0
JPL_LOM_DEV_OF
F
JPG1
JVR1
JPF
1
JPF
2
BT1
SP1
JP4
JITP1
J2
3
JPCIE
3
JF
1
SXB1
B
USB 8/9(3.0)
USB 6/7
USB 4/5
USB 2/
3
S
ATA
DOM+POWE
R
S
ATA
DOM+POWE
R
UID-SW
COM2
IPMI_LAN
VGA
CPU SLOT3 PCI-E 3.0 X8(IN X16)
SXB2
B
SXB2A
SXB1A
JBT1
PWR
JF1
ON
RST
2
NIC
1
NIC
FF
OH
LED LED
PWR
HDD
X NMI
DIMMB2
DIMMA1
DIMMB1 DIMMA2
LAN1
LAN2
DIMMD
2
DIMMC
1
DIMMD
1
DIMMC
2
COM1
USB 0/1(3.0)
CPU
LGA2011-3
1
1
C
Serial Link General-Purpose Headers
(SGPIO)
Pin Definitions
Pin# Definition
Pin# Definition
1
NC
2
NC
3
Ground
4
DATA Out
5
Load
6
Ground
7
Clock
8
NC
A. I-SGPIO1
B. I-SGPIO2
C. S-SGPIO
D. TPM Header
B
I-SGPIO1/I-SGPIO2/S-SGPIO
Three (3) T-SGPIO (Serial-Link Gen-
eral Purpose Input/Output) headers
are located next to the I-SATA Ports
on the motherboard. These headers
are used to communicate with the
enclosure management chip in the
system. See the table on the right
for pin definitions. Refer to the board
layout below for the locations of the
headers.
Trusted Platform Module Header (JTPM1)
Pin Definitions
Pin # Definition
Pin # Definition
1
LCLK
2
GND
3
LFRAME#
4
No Pin
5
LRESET#
6
+5V (X)
7
LAD3
8
LAD2
9
3.3V
10
LAD1
11
LAD0
12
GND
13
SMB_CLK4 (X)
14
SMB_DAT4 (X)
15
P3V3_STBY
16
SERIRQ
17
GND
18
GND
19
P3V3_STBY
20
LDRQ# (X)
TPM Header (JTPM1)
This header is used to connect a
Trusted Platform Module (TPM),
which is available from a third-party
vendor. A TPM is a security device
that supports encryption and authen-
tication in hard drives. It enables the
motherboard to deny access if the
TPM associated with the hard drive
is not installed in the system. See the
table on the right for pin definitions.
D
A
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