5-10
S
UPER
S
ERVER 1028UX-TR4 User's Manual
Figure 5-4. SUPER X10DRU-X Layout
5-6 Serverboard Details
Notes:
" " indicates the location of "Pin 1". Jumpers/LEDs not indicated are for
testing purposes only. Components not documented are for internal use only.
X10DRU-X
REV:1.01
I-SGPIO2
JF1
JL
1
DESIGNED IN USA
JUSBA1
JBAT1
JBT1
JSD
2
JSD
1
SP1
LED_H1
LED_G
2
LED_G
1
LED_H
2
LED_F
2
LED_E
1
LED_E
2
LED_F
1
LED_C2
LED_C1
LED_D
1
LED_B
2
LED_A
1
LED_A
2
JIPMB1
FA
N8
FAN7
FAN6
FAN5
FAN4
FAN3
FAN2
FAN1
JVRM2
JVRM1
JWD2
JPG
1
JPB1
LED1 JUIDB2
SXB3_2
PSU2
PSU1
JGPW2
JGPW3
JGPW1
JPW22
JPW23
JPW21
JGPW4
JPW19
JTPM1
SXB1_3
SXB3_3
SXB1_1
SXB3_1
BAR CODE
BIOS LICENSE
IPMI CODE
P2-DIMMG
2
P2-DIMMG
1
P2-DIMMH
1
P2-DIMMH
2
CPU2
SXB1
B
SXB1
C
SXB1A
CPU1_POR
T3
CPU2_POR
T2
USB3/4 (3.0
)
JPME2
GPU PWR3
GPU PWR2
CPU2_POR
T1
SXB2
VGA
P2-DIMMF
2
P2-DIMMF
1
GPU PWR4
I-SA
TA
4
P2-DIMME2 P2-DIMME1
I-SA
TA
5
S-SA
TA
0~
3
COM1
I-SA
TA
0~
3
IPMI_LAN
USB 0/1(3.0)
CPU1_POR
T2
P1-DIMMC
1
P1-DIMMC
2
P1-DIMMD
2
P1-DIMMD
1
CPU2_POR
T3
CPU1_POR
T1
CPU1
P1-DIMMB2 P1-DIMMB1 P1-DIMMA2
GPU PWR1
P1-DIMMA1
BP PWR2
BP PWR1
CLOSE 1st
OPEN 1st
CLOSE 1st
OPEN 1st
SXB1_2
PLD1
C612
A1
LED_D
2
LED2
HDD_LED1
1
LED_B
1
BMC
BMC_HB_LED1
JA1
X10DRU-X Quick Reference
Jumper
Description
Default Setting
JBT1
Clear CMOS
See Section 5-8
JPB1
BMC Enabled
Pins 1-2 (Enabled)
JPG1
VGA Enabled
Pins 1-2 (Enabled)
JPME2
Manufacturing Mode
Pins 1-2 (Disabled)
JWD2
Watch Dog
Pins 1-2 (RST)
JVRM1/JVRM2
I
2
C Bus for VRM
Pins 1-2 (BMC: Normal)
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