1-4
X6DHR-C8 User's Manual
Figure 1-2.
X6DHR-C8 Motherboard Layout
(not drawn to scale)
JLAN1
®
S
UPER X6DHR-C8
JLAN2
DIMM 2B (Bank 2)
DIMM 2A (Bank 2)
DIMM 3B (Bank 3)
DIMM 3A (Bank 3)
DIMM 4B (Bank 4)
DIMM 4A (Bank 4)
DIMM 1A (Bank 1)
DIMM 1B (Bank 1)
Fan1
JF1
FP Ctrl
J
D1
JP15
Fan2
JOH1
Fan3
J L 1
IPMI
JIDE1
B I O S
J 1 8
J P A 1
SCSI CH
A
SCSI CH B
Fan4
7 9 0 2
CTRL
SATA0 SATA1
U S B 2 / 3
SMBUS
Buzzer
JWOR
1
Battery
J P L 1
RAGE-
X L
PCI-X #1 100 MHz
Super
IO
(North
Bridge)
J P G 1
COM1
U S B
0 / 1
K B /
Mouse
Fan5 Fan6
ATX PWR
4-Pin
P W R
24-Pin
Fan7
J 2 4
JP1
2
Fan8
S C S I
CPU 1
P X H
PCI-E x8
COM2
J P A 2
J P A 3
D A 1
D A 2
ICH5R
P X H
L i n d e n h u r s t
Clear
CMOS
(South
Bridge)
E7520
JLAN3
JLAN4
JLAN5
Cavium
1230 SL
JPL3 JPL4
JPL2
J A 2
J 2 7
JPW3
JPW1
JPW2
J
PC1
DA10
DA12
JWOL1
D A 8
DA14
CPU 2
V G A
8-Pin
P W R
JP14
JP
1
3
L E 1
J U S B 2
J 5 1
J 5 2
J 2 4
P C I 1
82546GB
82546GB
82546GB 82546GB
JLAN6
JLAN7
JLAN8
Compact
Flash Card
Type
1
Important Notes to the User
• All images and graphics shown in this manual were based upon the latest
PCB Revision available at the time of publishing of this manual. The mother-
board you've received may or may not look exactly the same as the graphics
shown in this manual.
• See Chapter 2 for detailed information on jumpers, I/O ports and JF1 front
panel connections.
• " " indicates the location of "Pin 1".
• When the LE1 LED is on, the 5V Standby PWR is on. Maker sure to turn off
the power before installing or removing components.
• Refer to Page 2-7 for the Logical Port# of each onboard LAN.
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