Supermicro SBA-7141A-T, Руководство пользователя

Страница: 49 / 72

5-11
Chapter 5: BIOS
ECC Configuration
The menu options in the ECC C
ONFIGURATION
submenu and their descriptions are
shown in Table 5-9 .
DRAM Timing Configuration
The menu options in the DRAM T
IMING
C
ONFIGURATION
submenu and their descriptions
are shown in Table 5-10 .
Table 5-9. ECC Configuration Submenu
Menu Option Description
ECC Mode
This submenu affects the DRAM scrub rate based on its setting. Options include
Disabled,
Basic , Good, Super, Max and User. Selecting User activates the other
options for user setting.
DRAM ECC Enable
This setting allows hardware to report and correct memory errors automatically,
maintaining system integrity. Options are
Enabled or Disabled.
DRAM Scrub
Redirect
This setting allows the system to correct DRAM ECC errors immediately when
they occur, even if background scrubbing is off. Options are Enabled or
Disabled .
4-Bit ECC Moe
Allows the user to enabled 4-bit ECC mode (also known as ECC Chipkill).
Options are
Enabled and Disabled.
DRAM BG Scrub
Corrects memory errors so later reads are correct. Options are Disabled and
various times in nanoseconds and microseconds.
Data Cache BG
Scrub Allows L1 cache RAM to be corrected when idle. Options are Disabled and
various times in nanoseconds and microseconds.
L2 Cache BG Scrub
Allows L2 cache RAM to be corrected when idle. Options are Disabled and
various times in nanoseconds and microseconds.
L3 Cache BG Scrub
Allows L3 cache RAM to be corrected when idle. Options are Disabled and
various times in nanoseconds and microseconds.
Table 5-10. DRAM Timing Configuration Submenu
Menu Option Description
Memory Clock Mode
This setting specifies the memory clock mode. Options are Auto , Limit and
Manual.
DRAM Timing Mode
This setting specifies the DRAM timing mode. Options are Auto and DCT0,
DCT1 and Both.