SIS Documentation
SIS3820
VME Scaler
Page 39 of 79
7.18.8 Data format
The data format bits allow you to select between a straight 32-bit and a 24-bit mode with
information from the two user inputs and channel information. For low rate and/or short dwell
time environments data reduction and lower dwell times can be accomplished by reduction of
the scaler depth to 16-bit or even 8-bit. Two respective four scaler values are packed into one
32-bit word in that case.
Format Bit 1 Format Bit 0 Data Format
0 0
32-bit
0
1
24-bit with user bit and channel information
1 0
16-bit
(MCS
only)
1 1
8-bit
(MCS
only)
A more detailed description of the data formats is given in section 8.
7.18.9 Clearing/non clearing
This bit decides, whether the scaler values are cleared upon LNE/clock shadow, or whether
the counter contents will be preserved and the accumulated counts will be stored to
SDRAM/to the shadow registers. The power up mode defaults to clearing, i.e. the number of
counts since the last readout cycle will be stored to SDRAM/to the shadow registers.
Refer to section 15.6 for a description of the function/behavior internal counter logic
Note:
The overflow logic (generation of overflow IRQ e.g.) is active in non clearing mode
only.
