Connectors
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DocID029088 Rev 3
7.5 Daughterboard
extension connectors CN5 and CN6
Two 60-pin male headers CN5 and CN6 can be used to connect a daughterboard or the
standard wrapping board to the STM32F779I-EVAL evaluation board. All GPIOs are
dispatched on memory connectors (CN10 and CN11), and on connectors CN5 and CN6.
The space between these two connectors is defined as a standard which allows developing
common daughterboards for several ST evaluation boards. The standard width between
CN5 pin 1 and CN6 pin 1 is 2700mils (68.58mm).
Each pin on CN5 and CN6 can be used by a daughterboard after disconnecting it from the
corresponding function block on the STM32F779I-EVAL evaluation board. For more details
refer to
and
Table 21. Daughterboard extension connector CN5
Pin Description
Alternative
function
How to disconnect with function block on
STM32F779I-EVAL board
1
GND
-
-
3
PH0
OSC_IN
Remove X1,C23, Close SB40
5
RESET#
-
-
7
PF6
QSPI_BK1_IO3
Remove R241
9
PF10
Potentiometer
Remove R30
11
PC0
ULPI_STP
Remove R123
13
PA2
SAI2_SCKB/MII_MDIO/MC_EnIndex
Open SB37, SB35
15
PA0
SAI2_SDB/ MII_CRS/MC_ENA
Open SB43, SB45, SB47
17
PF8
QSPI_BK1_IO0
Remove R242
19
GND
-
-
21
PA4
PAR_HSYNC
Disconnect CN4
23
PC2
MII_TXD2/MC_CurrentB
Open SB49, remove R245
25
PC4
MII_RXD0/
MC_BUSVOLTAGE
Open SB51, SB54
27
PC3
MII_TX_CLK/ MC_CurrentC
Open SB52, SB56
29
PB2
QSPI_CLK
-
31
PJ3
LCD_R4/LED3
Open SB59
33
PB10
ULPI_D3/LCD_G4
Remove R100, open SB63
35
PB14
USB_FS2_DM
Disconnect CN14
37
PH6
MII_RXD2/MC_DissipativeBrake
Open SB53, SB55
39
GND
-
-
41
PB12
ULPI_D5/ USB_FS2_ID
Open SB65, remove R107
43
PB13
ULPI_D6/ USB_FS2_VBUS
Remove R263, R113
45
PJ9
-
-
47
PG7
NAND_INT
Open SB19