Hardware layout and configuration
UM2036
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DocID029088 Rev 3
Note:
I
2
C address of WM8994ECS/R is 0b0011010.
JP7
PD6 is as SD2_CLK signal when JP7 is set as shown to the right (Default setting):
PD6 is connected to DFSDM_DATA1 when JP7 is set as shown to the right (Also
need to set JP23 together according to this table):
JP22
Digital microphone power source is connected to +3.3V power when JP22 is set as
shown to the right (Default setting):
Digital microphone power source is connected to MICBIAS1 from WM8994ECS/R
when JP22 is set as shown to the right:
JP3
PA2 is connected to SAI2_SCKB when JP3 is set as shown to the right (Default
setting):
PA2 is connected to MII_MDIO (Ethernet) when JP3 is set as shown to the right:
JP6
PC1 is connected to SAI1_SDA when JP6 is set as shown to the right (Default
setting):
PC1 is connected to MII_MDC (Ethernet) when JP6 is set as shown to the right.
Table 7. Audio related jumpers (continued)
Jumper
Description