Hardware layout and configuration
UM2036
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DocID029088 Rev 3
6.13 Memories
8M x 32bit SDRAM is connected to the SDRAM bank1 of the FMC interface of the
STM32F779NI.
Table 11. Ethernet related jumpers
Jumper
Description
JP12
25MHz clock is provided by external crystal X4 when JP12 is set as shown to the
right: (Default setting)
25MHz clock for MII is provided by MCO at PA8 when JP12 is set as shown to the
right:
JP4
MDIO connect to MII_MDIO_GPIO when JP4 is set as shown to the right: (Default
setting)
MDIO connect to MII_MDIO when JP4 is set as shown to the right:
JP8
MDC connect to MII_MDC when JP8 is set as shown to the right:
MDC connect to MII_MDC_GPIO when JP8 is set as shown to the right: (Default
setting)
Table 12. Ethernet related solder bridges
Solder
bridges
Description
SB47
MII CRS on DP83848CVV is connected to PA0 when SB47 is closed and SB43,
SB45 are open. Default setting: Open
SB58
MII COL on DP83848CVV is connected to PH3 when SB58 is closed and R255 is
unmounted. Default setting: Open
SB12
MII_RX_ER on DP83848CVV is connected to PI10 when SB12 is closed and R252
is unmounted. Default setting: Open