Spectrum M2p.59 Series, Руководство по оборудованию, Страница: 98 / 190

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Trigger masks Trigger modes and appendant registers
Trigger masks
Trigger OR mask
The purpose of this passage is to explain the trigger OR mask (see
left figure) and all the appendant software registers in detail.
The OR mask shown in the overview before as one object, is separat -
ed into two parts: a general OR mask for main external trigger (ex -
ternal analog window trigger), the secondary external trigger
(external analog comparator trigger, the various PXI triggers (availa -
ble on M4x PXIe cards only) and software trigger and a channel OR
mask.
Every trigger source of the M2p series cards is wired to one of the above men -
tioned OR masks. The user then can program which trigger source will be rec -
ognized, and which one won’t.
This selection for the general mask is realized with the SPC_TRIG_ORMASK
register in combination with constants for every possible trigger source.
This selection for the channel mask (A/D cards only) is realized with the SP -
C_TRIG_CH_ORMASK0 register in combination with constants for every pos -
sible channel trigger source.
In either case the sources are coded as a bitfield, so that they can be combined
by one access to the driver with the help of a bitwise OR.
The table below shows the relating register for the general OR mask and the
possible constants that can be written to it.
Please note that as default the SPC_TRIG_ORMASK is set to SPC_TMASK_SOFTWARE. When not using any trig -
ger mode requiring values in the SPC_TRIG_ORMASK register, this mask should explicitely cleared, as other -
wise the software trigger will override other modes.
The following example shows, how to setup the OR mask, for the two external trigger inputs, ORing them together. When using just a single
trigger, only this particular trigger must be used in the OR mask register, respectively. As an example a simple edge detection has been
chosen for Ext1 input and a window edge detection has been chosen for Ext0 input. The explanation and a detailed description of the different
trigger modes for the external trigger inputs will be shown in the dedicated passage within this chapter.
Table 54: Spectrum API: external trigger OR mask related software register and available settings
Register Value Direction Description
SPC_TRIG_AVAILORMASK 40400 read Bitmask, in which all bits of the below mentioned sources for the OR mask are set, if available.
SPC_TRIG_ORMASK 40410 read/write Defines the events included within the trigger OR mask of the card.
SPC_TMASK_NONE 0h No trigger source selected
SPC_TMASK_SOFTWARE 1h Enables the software trigger for the OR mask. The card will trigger immediately after start.
SPC_TMASK_EXT0 2h Enables the external (analog) trigger 0 for the OR mask. The card will trigger if the programmed condition for this
input is valid.
SPC_TMASK_EXT1 4h Enables the X1 (logic) trigger for the OR mask. The card will trigger if the programmed condition for this input is valid.
SPC_TMASK_EXT2 8h Enables the X2 (logic) trigger for the OR mask. The card will trigger if the programmed condition for this input is valid.
SPC_TMASK_EXT3 10h Enables the X3 (logic) trigger for the OR mask. The card will trigger if the programmed condition for this input is valid.
spcm_dwSetParam_i32 (hDrv, SPC_TRIG_EXT0_LEVEL0, 1800); // External trigger level set to 1.8 V
spcm_dwSetParam_i32 (hDrv, SPC_TRIG_EXT0_MODE, SPC_TM_POS); // Setting up to detect positive edges
spcm_dwSetParam_i32 (hDrv, SPC_TRIG_EXT1_MODE, SPC_TM_NEG); // Setting up X1 logic trigger for falling edges
// Enable both external triggers within the OR mask, by ORing the mask flags together
spcm_dwSetParam_i32 (hDrv, SPC_TRIG_ORMASK, SPC_TMASK_EXT1 | SPC_TMASK_EXT0);
Image 55: Trigger overview - trigger OR mask
Image 56: trigger OR mask details