Spectrum M2p.59 Series, Руководство по оборудованию, Страница: 137 / 190

Mode Gated Sampling Limits of pre trigger, post trigger, memory size
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Please keep in mind that this table shows all values at once. Only the absolute maximum and minimum values are shown. There might be
additional limitations. Which of these values are programmed depends on the used mode. Please read the detailed documentation of the
mode.
Gate-End Alignment
Due to the structure of the on-board memory, the length of a gate will be rounded up until the next card specific alignment:
So in case of a M4i.22xx card with 8bit samples and one active channel, the gate-end can only stop at 32Sample boundaries, so that up to
31 more samples can be recorded until the post-trigger starts. The timestamps themselves are not affected by this alignment.
Gated Sampling and Timestamps
Gated Sampling and the timestamp mode fit very good together. If timestamp
recording is activated each gate will get timestamped as shown in the draw -
ing on the right. Both, beginning and end of the gate interval, are times -
tamped. Each gate segment will therefore produce two timestamps
(Timestamp1 and Timestamp2) showing start of the gate interval and end of
the gate interval. By taking both timestamps into account one can read out the
time position of each gate as well as the length in samples. There is no other
way to examine the length of each gate segment than reading out the times -
tamps.
Please keep in mind that the gate signals are timestamped, not the beginning
and end of the acquisition. The first sample that is available is at the time po -
sition of [Timestamp1 - Pretrigger]. The length of the gate segment is [Timestamp2 - Time Ali Pret Posttrigger]. The
last sample of the gate segment is at the position [Time Ali Posttrigger]. When using the standard gate mode the end of
recording is defined by the expiring memsize counter. In standard gate mode there will be an additional timestamp for the last gate segment,
when the maximum memsize is reached!
The programming details of the timestamp mode are explained in an extra chapter.
Table 83: Spectrum API: gate end alignement in Gated Sampling mode
M2i + M2i-exp M4i + M4x M2p
Active Channels 8bit 12/14/16 bit 8bit 14/16 bit A/D and D/A
16bit
DIO
1 channel 4 Samples 2 Samples 32 Samples 16 Samples 8 Samples ---
2 channels 2 Samples 1 Samples 16 Samples 8 Samples 4 Samples ---
4 channels 1 Sample 1 Samples 8 Samples 4 Samples 2 Samples ---
8 channels --- 1 Samples --- --- 1 Samples ---
16 channels --- 1 Samples --- --- --- 8 Samples
32 channels --- --- --- --- --- 4 Samples
Image 68: Drawing of Gated Sampling mode and Timestamp positions