STR-DA5500ES
172
DISPLAY BOARD IC105
μ
PD78F0527GB(S)-UET-A (UPDATE SIGNAL PROCESSOR)
Pin No.
Pin Name
I/O
Description
1 to 4
NO USE
-
Not used
5
RESET
I
Reset signal input from the system controller “L”: reset
6, 7
NO USE
-
Not used
8
FLMD0
I
Writing mode setting signal input terminal
9
OSC OUT
O
System clock output terminal (5 MHz)
10
OSC IN
I
System clock input terminal (5 MHz)
11
REGC
I
External capacitor connection terminal
12
VSS
-
Ground terminal
13
VDD
-
Power supply terminal (+3.3V)
14 to 16
BAUDRATE3 to
BAUDRATE1
I
Baud rate setting terminal
17
NO USE
-
Not used
18
P33
O
Writing mode setting signal output terminal
19 to 30
NO USE
-
Not used
31
IR OUT
O
SIRCS signal output terminal
32
NO USE
-
Not used
33
NO USE
I
Update signal input terminal
34
NO USE
O
Update signal output terminal
35
NO USE
-
Not used
36
UART IN
I
Serial data input from the system controller
37
UART OUT
O
Serial data output to the system controller
38
AVREF
I
Reference voltage (+3.3V) input terminal
39
AVSS
-
Ground terminal
40 to 47
NO USE
-
Not used
48
LEARN LED
O
LED drive signal output terminal Not used
49, 50
NO USE
-
Not used
51
LEARN CIR ON
O
Learning circuit on/off control signal output terminal “H”: learning circuit on
52
LEARN IR IN
I
SIRCS (for learning) signal input terminal
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