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STR-DA5500ES
152
Pin No.
Pin Name
I/O
Description
Y3
AHREF_DE
I
Data enable signal input from the HDMI receiver
Y4
ADATA23
I
Digital video signal input from the HDMI receiver
Y23
IO_3.3V
-
Power supply terminal (+3.3V)
Y24
OCM_INT2
-
Not used
Y25
VGA1_SDA
-
Not used
Y26
VGA1_SCL
-
Not used
AA1
NC
-
Not used
AA2 to
AA4
DGND_ADC
-
Ground terminal
AA23
MSTR0_SDA
I/O
Two-way I2C data bus with the EEPROM
AA24
MSTR0_SCL
O
I2C clock signal output to the EEPROM
AA25
VGA0_SDA
-
Not used
AA26
VGA0_SCL
-
Not used
AB1
A1P
I
Component video signal (P
R
/C
R
) input from the COMPONENT VIDEO IN jack
AB2
SV1P
I
Analog video signal (R) input from the OSD controller
AB3
AGND_ADC
-
Ground terminal
AB4
ADC_1.8V
-
Power supply terminal (+1.8V)
AB23
IO_3.3V
-
Power supply terminal (+3.3V)
AB24
IRO
-
Not used
AB25
MSTR2_SDA
-
Not used
AB26
MSTR2_SCL
-
Not used
AC1
C1P
I
Component video signal (Y) input from the COMPONENT VIDEO IN jack
AC2
B1P
I
Component video signal (P
B
/C
B
) input from the COMPONENT VIDEO IN jack
AC3
AGND_ADC
-
Ground terminal
AC4, AC5
ADC_1.8V
-
Power supply terminal (+1.8V)
AC6
AGND_ADC
-
Ground terminal
AC7
VOUT2
-
Not used
AC8
AGND_ADC
-
Ground terminal
AC9
LBADC_3.3V
-
Power supply terminal (+3.3V)
AC10
LBADC_IN4
-
Not used
AC11
LBADC_GND
-
Ground terminal
AC12
AVSIN_DATA
-
Not used
AC13
EXTOSD_HS
-
Not used
AC14
IO_3.3V
-
Power supply terminal (+3.3V)
AC15
OCMADDR18
O
Address signal output to the
fl
ash memory
AC16
IO_3.3V
-
Power supply terminal (+3.3V)
Address signal output to the
fl
ash memory
Power supply terminal (+3.3V)
Address signal output to the
fl
ash memory
Power supply terminal (+3.3V)
Two-way data bus with the
fl
ash memory
Power supply terminal (+3.3V)
Two-way data bus with the
fl
ash memory
Chip select signal output terminal Not used
Read enable signal output to the
fl
ash memory
Write enable signal output to the
fl
ash memory
Not used
AD2
AGND_ADC
-
Ground terminal
AD3 to
AD5
ADC1_3.3V
-
Power supply terminal (+3.3V)
AD6, AD7
ADC2_3.3V
-
Power supply terminal (+3.3V)
AD8
AGND_ADC
-
Ground terminal
AD9
RESET
I
Reset signal input from the video system controller “L”: reset
AD10
LBADC_IN3
-
Not used
AD11
LBADC_RETURN
-
Not used
AD12
AVSIN_WORDSEL
-
Not used
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