STR-DA5500ES
157
Pin No.
Pin Name
I/O
Description
76
2nd Faroudjia Power
DETECT
I
Power detection signal input terminal Not used
77
2nd Faroudjia UCOM
BUSY
I
Busy signal input terminal Not used
78
2nd Faro Wake
O
Wake-up signal output terminal Not used
79
NO USE
-
Not used
80
HDSEL_RESET
O
Reset signal output to the HDMI output selector “L”: reset
81
REPEAT_PATH_SEL
O
Digital video signal (for HDMI OUT) selection signal output to the HDMI output selector
82
HDSEL_POWER
O
Power supply on/off control signal output terminal for HDMI output selector “H”: power on
83
HSYNC_TH
O
Video processor selection signal output to the HDMI output selector
84, 85
NO USE
-
Not used
86
SRAM CE
O
Chip select signal output to the S-RAM
87
YAMAHA CE
O
Chip select signal output to the OSD controller
88
VSS
-
Ground terminal
89
VCC
-
Power supply terminal (+3.3V)
90 to 92
NO USE
-
Not used
93
SRAM OE, UB, LB/
YAMAHA RD_N
O
Output enable signal, upper-byte control signal and lower-byte control signal output to the
S-RAM
Read enable signal output to the OSD controller
94
SRAM UB,WE/
YAMAHA WR_N
O
Write enable signal output to the OSD controller
Upper-byte control signal and write enable signal output to the S-RAM
95
SRAM LB, WE
O
Lower-byte control signal and write enable signal output to the S-RAM
96
YAMAHA WAIT_N
I
Wait signal input from the OSD controller
97 to 103
NO USE
-
Not used
104
VSS
-
Ground terminal
105
VCC
-
Power supply terminal (+3.3V)
106 to 113
SRAM IO0 to
SRAM IO7
I/O
Two-way data bus with the S-RAM
114 to 121
SRAM IO8/YAMAHA D0
to SRAM IO15
/YAMAHA D7
I/O
Two-way data bus with the OSD controller and S-RAM
122
YAMAHA PS0
O
Address signal output to the OSD controller
123, 124
SRAM A0/YAMAHA
PS1, SRAM A1
/YAMAHA PS2
O
Address signal output to the OSD controller and S-RAM
125 to 131 SRAM A2 to SRAM A8
O
Address signal output to the S-RAM
132
VSS
-
Ground terminal
133
VCC
-
Power supply terminal (+3.3V)
134 to 141 SRAM A2 to SRAM A8
O
Address signal output to the S-RAM
142 to 147
NO USE
-
Not used
-
Ground terminal
-
Power supply terminal (+3.3V)
O
Serial data output to the video processor
I
Serial data input from the video processor
-
Not used
O
Serial data output terminal Not used
I
Serial data input from the video processor Not used
156
NO USE
-
Not used
157
STOP IN
I
AC cut detection signal input terminal “H”: AC cut
158 to 161
NO USE
-
Not used
162
MAIN UCOM SDA
I/O
Two-way I2C data bus with the system controller
163
MAIN UCOM
UART BUSY
O
Busy signal output to the system controller “H”: busy
164
MAIN UCOM SCL
I/O
Two-way I2C clock bus with the system controller
165
NO USE
-
Not used
166
DAC SDA
I/O
Two-way I2C data bus terminal Not used
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