Sony HXC-100, Руководство по обслуживанию

Страница: 112 / 206

3-12
HXC-100/V2 (J, E)
3-12
2
3
4
5
1
A B C D E F G H
CD-61 (7/12) CD-61 (7/12)
GND
GND
JTAG 010
0.1uF
C726
S701
1 2
3 4
5 6
7 8
GND
100
RB706
12 34 56 78
+3.2V
100
RB701
1 2
3 4
5 6
7 8
GND
22k
RB702
12 34 56 78
GND
+3.2V
GND
TC7SH08FU(T5RSOYJF)
IC708 (1/2)
2
1
4
+3.2V
47k
RB709
12 34 56 78
47k
RB708
12 34 56 78
10k
R701
0.1uF
C730
+3.2V
0.1uF
C733
+3.2V
GND
TC7SH08FU(T5RSOYJF)
IC708
(2/2)
3
GND
5
VCC
GND
22k
RB707
12 34 56 78
GND
+3.2V
100
RB704
1 2
3 4
5 6
7 8
+3.2V
CN701
1 VCC
2 NC
3 TDI
4 TDO
5 TMS
6 TCK
11 12
7 MODE(L)
8 GND
9 NC
10 NC
R3112N281A-TR-FA
IC707
CD
5
GND
3
OUT
1 VDD
2
NC
4
GND
22k
RB703
12 34 56 78
GND
GND
GND
+3.2V
0.01uF
C732
100
R707
+3.2V
100
R705
100
RB705
1 2
3 4
5 6
7 8
0.1uF
C728
GND
100
R715
0.1uF
C727
GND
+3.2V
GND
PLD-CONF_DONE-CD 002
PLD-RECONFIG 002
GND
CONFIG12-nCONFIG 010
47 R710
+3.2V
CONFIG12-CONF_DONE 010
47
R708
GND
10V
0.1uF
C729
0
R709
GND
100
RB710
1 2
3 4
5 6
7 8
EPCS4SI8N(15)
IC706
ASDI
5
VCC2
7
DATA
2
DCLK
6
CS
1
GND
4
VCC1
3
VCC3
8
1uF C706
0.1uF
C715
0.1uF
C719
1uH
L702
GND
1uH
L701
0.1uF C720
0.1uF C717
GND
1uF C705
6.3V
10uF
C702
1uF C707
6.3V
10uF
C701
+2.5V
+3.2V
0.1uF C718
0.1uF C716
1uF C704
0.1uF C713
0.1uF C714
+3.2V-7
+1.5V
1uF C709
0.1uF C725
GND
1uF C712
1uF C708
0.1uF C721
6.3V
10uF
C703
0.1uF C723
0.1uF C722
1uF C711
1uF C710
0.1uF
C724
1uH
L703
74M-CLK-FPGA-DEMUX 003
47 R711
47 R713
47
R714
CONFIG12-nSTATUS 010
+3.2V
0
R716
NM
CPU-CLK_DEMUX 003
JTAG-CPU 002
47 R712
DEMAP_SW 010
TC74LCX125FT(EKJ)
IC702
(1/5)
2
1
3
IC702
(2/5)
5
4
6
IC702
(3/5)
9
10
8
IC702
(4/5)
12
13
11
TC74LCX125FT(EKJ)
IC702
(5/5)
7
GND
14
VCC
TC74LCX125FT(EKJ)
IC703
(5/5)
7
GND
14
VCC
TC74LCX125FT(EKJ)
IC703
(1/5)
2
1
3
IC703
(2/5)
5
4
6
IC703
(3/5)
9
10
8
IC703
(4/5)
12
13
11
TC7SH00FU(T5RSOYJF)
IC704
2
1
4
5
3
TC7SH08FU(T5RSOYJF)
IC712
2
1
4
5
3
GND
GND
+3.2V
0.1uF
C738
0.01uF
C739
CONF-SW-POS 010
74M-CLK-FPGA-DEMUX2 003
DEMUX-64FS 006
0
R758
EP1C20F324C8N(300)
(5/6) IC701
VCCINT1[B1]
2
VCCIO1_1[E1]
5
VCCIO1_2[P1]
14
VCCINT2[U1]
17
VCCINT3[V2]
19
VCCIO4_1[V5]
22
VCCIO4_2[V14]
31
VCCINT4[V17]
34
VCCINT5[U18]
36
VCCIO3_1[P18]
39
VCCIO3_2[E18]
48
VCCINT6[B18]
51
VCCINT7[A17]
53
VCCIO2_1[A14]
56
VCCIO2_2[A5]
65
VCCINT8[A2]
68
VCCA_PLL1[J5]
229
VCCIO4_3[P8]
237
VCCIO4_4[P11]
240
VCCIO2_3[E12]
254
VCCIO2_4[E9]
257
VCCINT9[N9]
271
VCCINT10[N11]
273
VCCINT11[F10]
285
VCCINT12[F8]
287
VCCIO1_3[G7]
289
VCCIO1_4[M7]
294
VCCINT13[M8]
295
VCCINT14[M10]
297
VCCIO3_3[M12]
299
VCCA_PLL2[J12]
302
VCCIO3_4[H12]
303
VCCINT15[G11]
305
VCCINT16[G9]
307
VCCINT17[L9]
313
VCCINT18[H10]
319
VCCINT19[J9]
321
VCCINT20[K10]
323
GND1[A1]
1
GND2[C1]
3
GNDA_PLL1[K1]
10
GND3[T1]
16
GND4[V1]
18
GND5[V3]
20
GND6[V16]
33
GND7[V18]
35
GND8[T18]
37
GNDG_PLL2[J18]
44
GND9[C18]
50
GND10[A18]
52
GND11[A16]
54
GND12[A3]
67
GND13[B2]
69
GND14[U2]
84
GND15[U17]
99
GND16[B17]
114
GNDG_PLL1[J6]
264
GND17[N8]
270
GND18[N10]
272
GND19[F11]
284
GND20[F9]
286
GND21[M9]
296
GND22[M11]
298
GNDA_PLL2[K12]
301
GND23[G10]
306
GND24[G8]
308
GND25[H8]
309
GND26[J8]
310
GND27[K8]
311
GND28[L8]
312
GND29[L10]
314
GND30[L11]
315
GND31[K11]
316
GND32[J11]
317
GND33[H11]
318
GND34[H9]
320
GND35[K9]
322
GND36[J10]
324
EP1C20F324C8N(300)
(6/6) IC701
CLK0/LVDSCLK1p[J3]
135
CLK1/LVDSCLK1n[J4]
186
CLK2/LVDSCLK2p[J15]
209
CLK3/LVDSCLK2n[J16]
162
IO4/nCSO[J1]
9
TDI[J17]
107
TMS[K14]
247
TCK[K18]
43
TDO[K13]
278
DATA0[H7]
290
DCLK[L1]
11
nCE[J7]
291
nCONFIG[J2]
76
nSTATUS[L12]
300
CONF_DONE[K17]
106
IO212/ASDO[K6]
265
nCEO[K2]
77
MSEL0[K3]
136
MSEL1[K7]
292
JTAG-CPU-TDI
JTAG-CPU-TMS
JTAG-TDO
JTAG-TMS
JTAG-TCK
TDO1
JTAG-CPU-TCK
JTAG-CPU-TDO
DEMAP_S3
DEMAP_S2
DEMAP_S1
EPR2
from/to DPR
from/to DPR
ON :EPR2
OFF:CPU
+3.2V
+2.5V
+1.5V
L:RESET(Re-Config)
angle-type
4:
DEMUX
IC1001
EPCS4
select
JTAG CHAIN
CPU
IC701
EP1C20
1
EP1C20
2
DEMAP
EPR2
EPCS4
to/from FPGA DEMAP,CKGEN
(0:CPU)
(0:EPR2)
(1:CPU)
Pow-ON_RES
(230mS==>100mS)
(0.047uF==>0.02uF)