— 80 —
KP-51WS500/57WS500/65WS500
5-5.
IC BLOCK DIAGRAMS
A BOARD: IC305, 307 SN74LV4053ANSR
11
14
15
4
3
5
1
2
13
12
16
7
8
10
9
6
X-
COMMON
A
B
C
INH
VSS
VDD
1Z
IN/OUT
1Y
0Z
0Y
1X
0X
VEE
Y-
COMMON
OUT/IN
Z-
COMMON
LOGIC LEVEL
CONVERSION
LOGIC LEVEL
CONVERSION
LOGIC LEVEL
CONVERSION
LOGIC LEVEL
CONVERSION
BINARY TO
1OF2
DECODERS
WITH
INHIBIT
TG
TG
TG
TG
TG
TG
BINARY TO
1OF2
DECODERS
WITH
INHIBIT
BINARY TO
1OF2
DECODERS
WITH
INHIBIT
A BOARD: IC308 CXD2085M
VDIN
SILCER
DECODE
I
2
CBUS
INTERFACE
SYNC.
SEP.
VSIN
XI
XO
SDA
SCL
OLBX
O169
6
7
12
13
15
16
9
10
A BOARD: IC305, TDA7265
10
11
MUTE / ST-BY
L + IN
R-VS L-VS
+VS
L OUT
L -IN
R OUT
R -IN
GND
R + IN
5
7
9
1
6
2
8
4
3