A BOARD SCHEMATIC DIAGRAM (3 OF 3)
1
|
2 |
3
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4
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5
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6
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7
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8
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9
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10
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11
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14
A
—
B
—
C
—
D
—
E
—
F
—
G
—
H
—
1
2
3
4
5
6
7
8
9
10
11
12
13
14
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
10
0
1
2
3
4
5
C702
C710
C730
C731
C732
D704
D710
D712
D713
IC701
R701
R728
R732
R737
R740
R7
4
2
R744
R7
47
R7
5
2
R
75
9
R766
R769
R782
R783
R784
R785
R786
R787
R788
R796
R803
R804
R806
R807
R810
R
76
4
R8
9
7
R8
9
8
R899
L702
R738
R7
43
R749
R745
R760
R761
R770
R762
C722
C799
C701
C705
R628
R767
R750
C745
C728
C733
R797
R727
R730
X701
Q703
Q705
D708
D709
R713
IC704
Q702
Q710
Q708
Q709
Q706
Q704
Q
Q716
Q715
R813
10
22p
CH:1608
10p
CH:1608
100p
CH:1608
100p
CH:1608
DAN202UT106
DAN202UT106
DAN202UT106
OR
DAN202UT106
OR
PST9145NL
RESET
470
1/16W
:CHIP
100
1/16W
:CHIP
10k
1/16W
:CHIP
100
1/16W
:CHIP
1
k
1/
16
W
:C
H
IP
1k
1/16W
:CHIP
10
0
1
/1
6W
:
CH
I
P
1
k
1/
16
W
:C
H
IP
1k
1/
1
6W
:
CH
I
P
1k
1/16W
:CHIP
100
1/16W
:CHIP
100
1/16W
:CHIP
100
1/16W
:CHIP
100
1/16W
:CHIP
1k1/16W
:CHIP
1k1/16W
:CHIP
10k
1/16W
:CHIP
100k
1/16W
:CHIP
1k
1/16W
:CHIP
10k
1/16W
:CHIP
22k
1/16W
:CHIP
4.7k
1/16W
:CHIP
4.7k
1/16W
:CHIP
10k
1/16W
:CHIP
1k
1/
1
6W
:
CH
I
P
1k
1
/1
6W
:
CH
I
P
4
7
1/
16
W
:C
H
IP
1k
1/16W
:CHIP
4.7k
1/16W
:RN-CP
10
0
1
/1
6W
:
CH
I
P
220k
1/16W
:CHIP
47k
1/16W
:CHIP
220k
1/16W
:CHIP
220k
1/16W
:CHIP
100k
1/16W
:CHIP
100k
1/16W
:CHIP
0.1
16V
B:1608
0.1
25V
F:1608
0.1
25V
F:1608
DAN
0.47
:FPRD
10k
1/16W
:CHIP
2.2k
1/16W
:CHIP
0.1
25V
F:1608
100
16V
0.001
25V
CH:1608
4.7k
1/16W
:CHIP
100
1/16W
:CHIP
100
1/16W
:CHIP
MA111
MA111
2SD601A
INV.
2SD601A
INV.
2.2k1/16W
:CHIP
2SB709A
SW
2SD601A
SW
2SD601A
SW
2SD601A
BUFF
2SB709A
SW
2SB709A
SW
2SB
TUNER
2SD601A
INVERT
2SD601A
INVERT
100k
1/16W
:CHIP
STBY 5V
SIRCS
MID BINT
L
I
N
E
M
U
T
E
+11V
Y
U
V
S
W
TU CONT
CTRL-S
P
M
U
T
E
P
R
O
T
M
U
T
E
X
S
W
KEY1
S
I
G
-
H
S
I
G
-
V
3
D
/
R
S
T
5V
A
M
U
T
E
M
A
I
N
R
L
Y
B
L
O
C
K
-
S
B
L
O
C
K
-
M
S-MODE2
S-MODE1
S-ATT
DVICONT
A
F
T
1
A
F
T
2
S
T
-
1
M
O
N
O
-
1
A
G
C
B
I
L
-
1
M
O
D
-
1
CONT-S OUT
CONT-S IN
VGA
MUTE
DVIRST
VCC
RST
V HOLD
HLF
AGC
IR IN
BYTE
RESET
XTAL
VSS
POWER MUTE
AC RLY
BS RST
MAIN RLY
CNST
NASY
YUV SW
M
A
I
N
S
T
F
M
O
N
O
M
A
I
N
F
M
O
N
O
S
U
B
A
N
T
S
U
B
A
F
T
M
A
I
N
A
F
T
O
S
D
V
O
S
D
H
T
E
S
T
C
V
-
I
N
U
V
-
S
A
V
E
AC OFF
LINE MUTE
-
BLOCK S
BLOCK M
M
I
D
B
-
I
N
T
S
T
B
-
C
N
T
R
L
K
E
Y
1
#R RESET
#CENTER SW
(TO P1)
(
T
O
P
1
)
(TO P1)
(
T
O
P
2
)
(TO P2)
(TO P1,P3)
(TO P1)
(TO P1,P3)
(TO P1)
(TO P1)
(TO P1)
(TO P1,P2)
(TO P1)
(TO P1)
(TO P1)
(TO P1)
(TO P1,P2)
(
T
O
P
2
)
(TO P2)
(TO P1)
(TO P2)
(TO P1)
(TO P1)
(TO P1)
CNVss
A
V
s
s
A
V
c
c
(TO P1)
#DVIRST
DVIASPT
DVIMUTE
DVISETUP
DVIVGA
STBY 5V
STBY 5V
+5V
+11V