HAP-Z1ES
HAP-Z1ES
54
54
• See page 75 for IC Pin Function Description.
5-19. SCHEMATIC DIAGRAM - FPGA DSP Board (2/3) -
Note:
IC001 on the FPGA DSP board cannot exchange with single. When
this part is damaged, exchange the complete mounted board.
0
3.3
CL411
CL427
0.1
C402
10k
R404
CL428
CL432
CL409
CL404
CL424
50P
CN401
1
GND
2
5V
3
PCIE_REFCLK_N
4
5V
5
PCIE_REFCLK_P
6
5V
7
GND
8
GND
9
PCIE_TX_N
10
3.3V
11
PCIE_TX_P
12
3.3V
13 GND
14
GND
15 PCIE_RX_N
16
IMX_MCLK
17 PCIE_RX_P
18
GND
19 GND
20
IMX_BCLK
21 W_DISABLE#(4_14)
22
IMX_LRCLK
23 PCIE_WAKE#(5_20)
24
IMX_SDOUT
25 PCIE_PERSTN(7_12)
26
IMX_SDIN
27 PCIE_PWR_EN(3_19)
28
IMX_BCLK2(1_12)
29 FPGA_DATA(7_13)
30
IMX_LRCLK2(1_14)
31 CS_DSP(2_26)
32
IMX_SDOUT2(1_13)
33 NC(2_27)
34
IMX_SDIN2(1_15)
35 SDO_DSP(2_24)
36
EPCS_NCS_IMX6(1_11)
37 SDI_DSP(2_25)
38
EPCS_ASDI_IMX6(1_10)
39 SDK_DSP(2_23)
40
FPGA_CONF_DONE(5_18)
41 FPGA_DCLK(4_10)
42
FPGA_RST(5_19)
43 FPGA_INTERRUPT(5_2)
44
FPGA_EN(5_21)
45 FPGA_NCONFIG(3_20)
46
HOLD_FLASH(5_27)
47 FPGA_NSTATUS(3_23)
48
FPGA_INIT_DONE(5_26)
49 GND
50
GND
CL414
CL408
CL406
10
R412
10
R420
CL420
CL417
10
R413
10
R421
FPGA_EN
CL412
CL413
CL429
CL425
10
R402
CL437
3.3V
CL402
SYSCLK_50
CL401
GND
MAIN_5V
CL418
CL426
0
R422
CL421
FPGA_INTERRUPT
CL405
CL430
CL407
CL433
R411
10
CL403
MAIN_3.3V
CL410
CL416
R409
10
10
R418
CL415
10
R403
10k
R405
CL423
CL436
CL419
CL438
CL431
0.1
C401
100
R401
R424
10k
CL422
2k
R426
EP4CGX30BF14C8N
IC001
GXB_RX0p
J2
GXB_RX0n
J1
GXB_RX1p
E2
GXB_RX1n
E1
CLK12/DIFFCLK_7p/REFCLK0p
J6
CLK13/DIFFCLK_7n/REFCLK0n
J7
CLK11/DIFFCLK_4p/REFCLK1p
E7
CLK10/DIFFCLK_4n/REFCLK1n
E6
GXB_TX0p
G2
GXB_TX0n
G1
GXB_TX1p
C2
GXB_TX1n
C1
RREF0
L1
CL435
CL434
IC001
>03S
(4/9)
CN402
MAIN
BOARD
CSP
FPGA
(Chip Size Package)
(3/4)
BOARD
(1/3)
>131S
FPGA DSP
BOARD
(3/3)
>135S
FPGA DSP
BOARD
(1/3)
>134S
FPGA DSP
9
10
11
C
D
E
G
H
F
7
2
B
3
A
4
5
1
6
8
10k
R316
10k
R315
10k
R308
10k
R306
10k
R305
10k
R303
0.01
C303
CL311
CL312
CL313
CL314
1k
R313
1k
R311
DTC114EE-TL
Q301
100
R304
CL303
CL304
CL305
CL306
CL307
CL308
CL309
VDD_3.3V
0.01
C301
10k
R301
R309
10k
10k
R310
10k
R312
CL310
EP4CGX30BF14C8N
IC001
DCLK
A4
nSTATUS
K6
nCONFIG
D5
CONF_DONE
J5
nCE
C4
IO/DATA0
A5
IO/DIFFIO_B3p/INIT_DONE
M6
IO/DIFFIO_R4n/DEV_CLRn
D10
TDI
A3
TCK
B3
TMS
A2
TDO
A1
MSEL0
K5
MSEL1
N3
MSEL2
L3
VCC_2.5V
R325
1k
RESET SWITCH
CSP
FPGA
(Chip Size Package)
(2/4)
IC001
(1/3)
BOARD
>133S
FPGA DSP
(2/3)
FPGA DSP BOARD
(Page 53)
(Page 53)
(Page 55)
(Page 53)
(Page 44)
Содержание HAP-Z1ES
Страница 119: ...MEMO HAP Z1ES 119 ...