Sony HAP-Z1ES, Руководство по обслуживанию

Страница: 53 / 120

HAP-Z1ES
HAP-Z1ES
53 53
• See page 70 for IC Block Diagrams. • See page 75 for IC Pin Function Description. 5-18. SCHEMATIC DIAGRAM - FPGA DSP Board (1/3) -
Note: IC001 on the FPGA DSP board cannot exchange with single. When
this part is damaged, exchange the complete mounted board.
3.3
3.3
3.3
3.3
3.3
2.5
5.2 6.4 1.2 3.2 5.2
0
5.2 3.2 5.1 0 5.1 1.1 4.9
TPS54295PWPR
IC101
VIN1
1
VBST1
2
SW1
3
PGND1
4
EN1
5
SS1
6
VFB1
7
GND
8
VREG5
9
VFB2
10
SS2
11
EN2
12
PGND2
13
SW2
14
VBST2
15
VIN2
16
10
C101
GND
0
R119
0
R120
0
R121
R128
0
R126
0
BD2231G-TR
IC103
VIN
1
GND
2
EN
3
!OC!
4
VOUT
5
0.1
C117
0.1
C118
FB108
FB107
0
R130
0
R129
MAIN_5V
FPGA_EN
10
C109
MAIN_3.3V
3.3V
10
C111
FB102
FB104
SHARC_3.3V
FB103
FB101
MM3464A25NRE
IC102
VDD
1
GND
2
CE
3
NC
4
VOUT
5
0.1
C116
1.5uH
L102
12k
R112
3k
R113
5.6k
R116
10
C119
10
C120
10k
R122
22
C113
22
C115
0
R104
20k
R114
0.1
C104
0.1
C106
0.01
C108
1k
R132
0
R102
VDD_3.3V
GND
VCC_2.5V
VDD_3.3V
DC/DC CONVERTER
IC101
+2.5V REGULATOR
IC102
IC103
B+ SWITCH
>134S
(2/3)
BOARD
FPGA DSP
BOARD
FPGA DSP
>133S
(2/3)
FPGA DSP
BOARD
>132S
(3/3)
FPGA DSP
BOARD
>131S
(2/3)
9 10 13 14 11 12 15 16
C
D
E
G
H
F
7 2
B
3
A
4 5 1 6 8
0.1 C208
0.1 C256
0.01 C223
0.01 C233
0.01 C240
0.01 C235
0.1 C249
0.01 C231
0.01 C239
0.1 C261
0.01 C229
0.1 C209
0.01 C230
0.1 C207
0.1 C202
0.01 C244
0.01 C237
0.1 C258
0.01 C224
0.01 C218
0.01 C216
0.1 C212
0.1 C254
0.1 C245
0.1 C260
0.01 C220
0.1 C204
0.01 C243
0.01 C214
0.1 C257
0.01 C236
0.1 C211
0.01 C226
0.01 C228
0.1 C210
0.1 C213
0.01 C238
0.1 C250
0.1 C247 0.01 C217
0.1 C206
0.1 C248
0.01 C225
0.01 C215
0.1 C253
0.01 C222
0.1 C203
0.1 C201
0.1 C246
0.1 C205
0.01 C241
0.01 C232
0.01 C234
0.01 C227
0.1 C252
0.1 C251
0.01 C221
0.01 C242 0.1 C259
0.1 C255
0.01 C219
0
R201
50MHz
X201
ENABLE/DISABLE
GND
OUT VDD
0.1
C263
FB201
0.01
C264
C265
0.001
C266
0.001
C262
0.001
10k
R202
CL207
CL201
CL202
CL203
CL204
CL205
CL206
CL208
EP4CGX30BF14C8N
IC001
VCCINT_F7
F7
VCCINT_J8
J8
VCCINT_H7
H7
VCCINT_H5
H5
VCCINT_G8
G8
VCCINT_G6
G6
VCCINT_G4
G4
VCCINT_F5
F5
VCCINT_E8
E8
VCCINT_E4
E4
VCCA_D4
D4
VCCA_K4
K4
VCCA_H9
H9
VCCA_D9
D9
VCCD_PLL_D3
D3
VCCD_PLL_J4
J4
VCCD_PLL_J10
J10
VCC_CLKIN3A
K7
VCC_CLKIN8A
D7
GND_E9
E9
GND_E5
E5
GND_D8
D8
GND_D6
D6
GND_B9
B9
GND_B7
B7
GND_B4
B4
GND_M1
M1
GND_L2
L2
GND_K2
K2
GND_K1
K1
GND_H2
H2
GND_H1
H1
GND_F2
F2
GND_F1
F1
GND_D2
D2
GND_D1
D1
GND_B2
B2
GND_B1
B1
VCCIO3
L6
VCCIO4_L8
L8
VCCIO4_L10
L10
VCCIO5_H11
H11
VCCIO5_J11
J11
VCCIO6_E11
E11
VCCIO6_G11
G11
VCCIO7_C10
C10
VCCIO7_C9
C9
VCCIO8_C7
C7
VCCIO9_C3
C3
VCCL_GXB_N1
N1
VCCL_GXB_F3
F3
VCCL_GXB_H3
H3
VCCH_GXB
G3
VCCA_GXB_M2
M2
VCCA_GXB_J3
J3
GND_E3
E3
GND_K3
K3
GND_J9
J9
GND_B12
B12
GND_M12
M12
GND_M10
M10
GND_M8
M8
GND_M5
M5
GND_J12
J12
GND_H8
H8
GND_H6
H6
GND_H4
H4
GND_G12
G12
GND_G7
G7
GND_G5
G5
GND_F8
F8
GND_F6
F6
GND_F4
F4
GND_E12
E12
0.001
C267
SYSCLK_50
FPGA
IC001
CSP
(Chip Size Package)
(1/4)
4
1
3
2
(CHASSIS)
ET204
(CHASSIS)
(CHASSIS)
(CHASSIS)
ET203
ET202
ET201
(1/3) FPGA DSP BOARD
E
E
E
E
C110
1
C102
10
C112
22
SHARC_CORE_1.1V
R117
0
R110
12k
R111
2.2k
R107
30k
C114
22
C105
0.1
C107
0.01
C103
0.1
R108
0
1.5uH
L101
R131
1k
FB105
(Page 54)
(Page 55)
(Page 54)
(Page 54)