Sony DXC-S500, Руководство по обслуживанию

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7-3
DXC-S500 (E)
[|IC|]
IC
AD9845AJST (AD)
37
38
39
40
41
42
43
44
45
46
47
48
1
2
3
4
5
6
7
8
9
10
11
12
PIN
NO.
O
O
O
O
O
O
O
O
O
O
O
O
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
PIN
NO.
PIN
NO.
PIN
NO.
I/O SIGNAL I/O SIGNAL I/O SIGNAL I/O SIGNAL
24
23
22
21
20
19
18
17
16
15
14
13
36 35 34 33 32 31 30 29 28 27 26 25
1 2 3 4 5 6 7 8 9
10 11 12
12-BIT SIGNAL PROCESSOR FOR CCD CAMERA
—TOP VIEW —
—
—
—
I
—
I
I
I
I
I
I
I
—
—
—
O
O
I
—
O
—
I
—
I
O
O
O
—
—
I
—
I
—
I
I
I
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D.V
CC
D.GND
D.GND
DATACLK
D.V
CC
HD
PBLK
CLPOB
SHP
SHD
CLPDM
VD
A.GND
A.GND
A.V
CC
BYP1
BYP2
CCDIN
NC
BYP4
A.V CC
AUX2IN
A.GND
AUX1IN
CML
VRT
VRB
D.V
CC
D.GND
THREE-STATE
NC
STBY
NC
SL
SDATA
SCK
INPUTS
AUX1IN, AUX2IN
CCDIN
CLPDM
CLPOB
DATACLK
HD
PBLK
SCK
SDATA
SHD
SHP
SL
STBY
THREE-STATE
VD
OUTPUTS
BYP1, BYP2, BYP4
CML
D0 - D11
VRB
VRT
OTHER
NC
: ANALOG INPUT
: ANALOG INPUT FOR CCD SIGNAL
: INPUT CLAMP CLOCK
: BLACK LEVEL CLAMP CLOCK
: DEGITAL DATA OUTPUT LATCH CLOCK
: HORIZONTAL DRIVE
: PREBLANKING CLOCK
: SERIAL DIGITAL INTERFACE CLOCK
: SERIAL DIGITAL INTERFACE DATA
: CDS SAMPLING CLOCK FOR CCD' S DATA LEVEL
: CDS SAMPLING CLOCK FOR CCD' S REFERENCE LEVEL
: SERIAL DIGITAL INTERFACE LOAD PULSE
: STANDBY MODE
: DIGITAL OUTPUT DISABLE
: VERTICAL DRIVE
: INTERNAL BIAS LEVEL DECOUPLING
: INTERNAL BIAS LEVEL DECOUPLING
: DIGITAL DATA
: A/D CONVERTER BOTTOM REFERENCE VOLTAGE DECOUPLING
: A/D CONVERTER TOP REFERENCE VOLTAGE DECOUPLING
: NO CONNECTION
COLOR
STEERING
BANDGAP
REFERENCE
INTERNAL
BIAS
INTERNAL
TIMING
+
CONTROL
REGISTERS
OFFSET
DAC
CLP
BUF
VGA
CDS
CLP
CLP
ADC
2:1
MUX
DIGITAL
INTERFACE
PBLK
19
18 24
30
23
36
34
46 48 47 21
20
1 - 12
38
39
37
22 16
CCDIN
CLPDM
AUX1IN
AUX2IN
SL
HD VD
SCK
SDATA
SHP
SHD
DATACLK
CLPOB
D0 - 11
VRT
VRB
CML
PxGA
2:1
MUX
10
8
6
4 dB ± 6 dB
2 dB _ 36 dB
12
256M (4194304 x 16 x 4) -BIT SDRAM
—TOP VIEW—
INPUTS
A0 - A12
AP
BS0, BS1
CAS
CKE
CLK
CS
LDQM
RAS
UDQM
WE
INPUTS/OUTPUTS
DQ0 - DQ15
OTHER
NC
: ADDRESS
: AUTO PRECHARGE ENABLE
: BANK SELECT
: COLUMN ADDRESS STROBE
: CLOCK ENABLE
: CLOCK
: CHIP SELECT
: LOWER DQ MASK ENABLE
: ROW ADDRESS STROBE
: UPPER DQ MASK ENABLE
: WRITE ENABLE
: DATA
: NO CONNECTION
V
CC
DQ0
QV
CC
DQ1
DQ2
QGND
DQ3
DQ4
QV
CC
DQ5
DQ6
QGND
DQ7
V
CC
LDQM
WE
CAS
RAS
CS
BS0
BS1
A10/AP
A0
A1
A2
A3
V
CC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
GND
DQ15
QGND
DQ14
DQ13
QV
CC
DQ12
DQ11
QGND
DQ10
DQ9
QV
CC
DQ8
GND
NC
UDQM
CLK
CKE
A12
A11
A9
A8
A7
A6
A5
A4
GND
HY57V561620BT-HDR (HYNIX)
RTC4574JE-TP (EPSON)
RTC-4574JE
REAL TIME CLOCK
—TOP VIEW —
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
V
CC
FOUT
CE0
AIRQ
TIRQ
CLK
DATA
CE1
FCON
GND
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
INPUTS
CE0, CE1
CLK
FCON
OUTPUTS
AIRQ
FOUT
TIRQ
INPUT/OUTPUT
DATA
OTHER
NC
: CHIP ENABLE
: SHIFT CLOCK
: CLOCK CONTROL
: ALARM INTERRUPT
: CLOCK
: CONSTANT CYCLE INTERRUPT
: DATA
: NO CONNECTION
OUTPUT
CONTROLLER
DEVIDER
FOUT
TIRQ
AIRQ
DATA
CLK
CE1
CE0
OSC
32.768
2
5
4
7
6
8
3
kHz
INTERRUPTS
CONTROLLER
BUS
INTERFACE
CIRCUIT
CLOCK AND
CALENDAR
CONTROL LINE
TIMER
REGISTER
ALARM
REGISTER
CONTROL
REGISTER
SHIFT
REGISTER