Sony DXC-S500, Руководство по обслуживанию

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6-9
DXC-S500 (E)
6-7. PA-267 Board
The PA-267 board is connected to CCD and supplies driving pulses and bias power. The PA-267 board
also outputs the video output signal from CCD to the CA-46 board via Q1 (emitter follower). The PA-
267 board contains a CCD temperature detection circuit required for the cooling control of CCD based on
a Peltier element that is the feature of this unit.
The temperature detection conforms to the change in a voltage (VBE of an internal transistor) between
pins 21 (CSUB) and 20 (SUB) of CCD. The PA-267 board consists of IC2, IC3, and Q2 to Q5. It
converts the potential difference between pins 21 and 20 of CCD into a current and sends it to the A/D
converter on the CA-46 board. The input voltage of the A/D converter changes linearly. For example,
the input voltage is about 2 V when the CCD temperature is 0
d
C. It is about 1 V when the CCD
temperature is 45
d
C. FET (Q2) cuts the shutter pulse with high amplitude added to pin 20 during PBLK
period and prevents the temperature detection circuit from malfunction.
6-8. CA-46 Board
The CA-46 board is the main board of CHU. It consists of IC101 (timing generator (TG)) that drives
CCD, IC110 (analog front end (AFE)) that process the video signal of CCD to produce a digital signal,
and a gigabit transceiver (IC114) for connecting CHU and CCU using a high-speed serial digital signal.
Main devices and their functions are described below.
Timing generator (IC101)
The timing generator is exclusively used for CCD (ICX282AQ). It contains an H driver, V driver, and
pulse generator. The operation mode is set by writing data from an external microcomputer to the
register in TG through a serial interface. The inside of TG operates in a basic clock of 22.5 MHz. The
basic clock is produced when a master clock of 45 MHz that is input from pin 26 (CKI) is internally
frequency-divided by 1/2. This unit has the flash mode, which synchronizes with an external trigger
input signal, as a special mode. After the trigger input, this mode requires the temporary stop of CCD
read operation. To temporarily stop the CCD read operation, the voltage (usually 15 V) at pin 41 (VH) of
IC101 is switched into 0 V using a circuit consisting of IC102, IC103, Q101, and Q102.
Analog front end (IC110)
The analog front end (IC110) consists of the following circuits.
.
CDS circuit that removes the noise contained in a CCD signal
.
PxGA circuit that can switch the gain for each RGB pixel and adjust the pre-white balance
.
Variable gain amplifier (VGA) of 0 to
+
36 dB
.
A/D converter for outputting a video signal as a 12-bit digital signal
Like TG, the operation mode of IC110 is set by writing data from the external microcomputer to the
register inside TG through a serial interface.
The amplitude of a digital signal is lowered with the power (at pin 13 (DRVDD)) in the final output stage
set as 2.5 V to suppress the influence that the switching noise of a video digital output signal exerts on the
analog input signal of a CDS circuit.