W995
1230-1858 rev. 1
APPENDIX
A
PPE
N
D
IX
C omponents - N2420
is in power down
•
When this pin is active, ULPI pins will operate normally.
If this pin is not in use, connect to VCC(I/O) directly.
plain input
CFG0 E1
I
Select SDR/DDR operation
•
LOW: SDR
•
HIGH: DDR
plain input
CFG1 B4
I
Select crystal/clock frequency with CFG2; see
Error! Reference source not
found.
plain input
CFG2 B3
I
Select crystal/clock frequency with CFG1; see
Error! Reference source not
found.
plain input
REG1V8
E6
P
1.8V regulator output; requiring parallel 0.1 uF and 4.7 uF capacitors.
Internally powers the digital core. Should not be used to power
external circuits.
DIR
E5
O
ULPI direction signal.
Slew rate controlled output
STP
D6
I
ULPI stop signal.
Push-pull input.
NXT
D5
O
ULPI next signal.
Slew rate controlled output
DATA7
C6
I/O
ULPI data pin 7.
Slew rate controlled output; Plain input.
DATA6
B6
I/O
ULPI data pin 6.
Slew rate controlled output; Plain input.
DATA5
A6
I/O
ULPI data pin 5.
Slew rate controlled output; Plain input.
DATA4
A5
I/O
ULPI data pin 4.
Slew rate controlled output; Plain input.
VCC(I/O)
B2, B5
P
Input I/O supply voltage. 1.4V-1.95V. A 0.1 uF decoupling capacitor is
recommended.
Note: only SDR timing is possible for ULPI with VCC(I/O) < 1.65V
DATA3
A3
I/O
ULPI data pin 3.
Slew rate controlled output; Plain input.
DATA2
A2
I/O
ULPI data pin 2.
Slew rate controlled output; Plain input.
DATA1
A1
I/O
ULPI data pin 1.
Slew rate controlled output; Plain input.
DATA0
B1
I/O
ULPI data pin 0.
Slew rate controlled output; Plain input.
CLOCK
A4
I/O
60MHz clock output when crystal is attached or clock is applied on
XTAL1 pin. Requires 60MHz clock input when a crystal is not attached.
Slew rate controlled output; Plain input.
TEST
C4
-
Connect to VCC(I/O) directly for normal operation
NC
F1, F2
-
Not Connected.
GND
E4,C5,D2
P
ground supply.
Pin Description for ISP1508
Pin Diagram
ball A1 index area
A
F
E
D
C
B
5
4
3
2
1
6
ISP1508 TFBGA36 pinout (top view)
Pin Description
Symbol
1
Ball No
Type
2
Description
RREF
C2
AI/O
Resistor reference. Connect through 12k
: r
1% to GND.
DM
C1
AI/O
Connect to D- pin of the USB connector
x
USB mode: D- input/output
x
UART mode: TXD output
DP
D1
AI/O
Connect to D+ pin of the USB connector
x
USB mode: D+ input/output
x
UART mode: RXD input
FAULT
E2
I
Input for Vbus digital over-current or fault detector signal.
If this pin is not in use, connect it to GND
Plain input, 5V tolerant
ID
D3
I
identification (ID) pin of the mini-USB cable.
If this pin is not in use, leave this pin open(there’s internal pull-up).
Plain input, TTL
VBUS
F4
AI/O
Connect to V
BUS
pin of the USB connector.
VCC
F3
P
Input supply voltage or battery source. Nominally 3.0V to 4.5V.
Note: Below 3.0V, USB FS and LS transactions are not guaranteed to
work though some devices may work with ISP1508 at these voltages.
PSW_N
D4
OD
Controls an external, active low V
BUS
power switch or charge pump.
An external pull up resistor is required.
Open drain,output, 5V tolerant.
REG3V3
E3
P
3.3V regulator output for USB mode or 2.7V regulator output for UART
mode; requiring parallel 0.1 uF and 4.7 uF capacitors. Internally
powers ATX and other analog circuits. Should not be used to power
external circuits.
XTAL1
F5
AI/O
Crystal/clock input. 1.8V peak input allowed. Frequency depends on
status on CFG1 and CFG2 pins.
XTAL2
F6
AI/O
Crystal output. If crystal is not in use, leave this pin open
CHIP_SEL
C3
I
Active HIGH chip select input.
•
When this pin is none-active, ULPI pins will be in 3-state and the chip
1
Symbol names ending with underscore N (for example, NAME_N) indicate active low signals
2
I=input; O=output; I/O = Digital Input/Output; OD = Open Drain Output; AI/O = Analog Input/Output; P = Power or
Ground pin
N2420 IC IF ISP1508 ES3 (3.5*3.5*0.8) 1200-1694
SEMC Troubleshooting Manual
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(125)
