W995
1230-1858 rev. 1
FUNCTIONAL OVERVIEW
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Technical Description
Radio Part
Antenna
The mobile system antenna interface connects the Wideband Code Division Multiple
Access (WCDMA) and Global System for Mobile Communication (GSM) input/output to
the antenna of the Mobile Phone. It is a bi-directional RF interface containing signals in the
range 800 MHz to 2.2 GHz. The mobile system antenna interface is the interface between
the Mobile Phone Radio Frequency (RF) input/output and the mobile system antenna. The
interface handles the GSM 850, EGSM 900, GSM 1800, GSM 1900 and WCDMA Band I, II
and V, RF inputs/outputs.
Mobile System Antenna Interface:
Radio Module N1200 (Tiger)
Front End
The Front End block connects the proper block in the radio system to the antenna. The
Front End has two inputs for EDGE/GSM/GPRS, one for low band (850/900 MHz) and one
for high band (1800/1900 MHz). The EDGE/GSM/GPRS power amplifier output is filtered
by the low pass filter in the Front End and then connected to the antenna through a switch.
In receive mode, the EDGE/GSM/GPRS signal from the antenna passes through the switch
to one of the four receive SAW filters. The SAW filter provides receive band selectivity. In
GSM/GRPS/EDGE systems, transmit and receive operations are divided in time and the
switch connects the proper block in accordance with the mode of operation (that is,
transmit or receive; one at a time).
In WCDMA the transmit outputs from the WCDMA transceiver are filtered by an external
SAW filter that cleans up the spectrum. The SAW filter output is connected to the power
amplifier, one for each band. For power control, a sample of the transmit output is taken
by a directional coupler and converted to a DC level by the power detection circuit. This
signal is used to control the transmitter output power. The transmit signal passes through
an isolator and then a duplexer. The duplexer output is selected by the switch in the Front
End for connection to the antenna. In WCDMA receive mode the signal from the antenna is
switched by the Front End to the correct duplexer. The output from the duplexer is
connected to the LNA input in the WCDMA receiver.
Transceiver
The transceiver is a multi-mode transceiver for WCDMA/EGDE/GPRS/GSM. The
EDGE/GPRS/GSM part of the transceiver use a digital baseband interface that is shared
between received and transmitted data. The receive interface is based on I and Q data
and the transmitter interface is based on envelope and frequency data. The WCDMA part
of the transceiver use differential analog in-phase and quadrature-phase interfaces, which
is an IQ-interface, in the receiver and the transmitter data paths.
Frequency Generation
The 26 MHz reference signal is used as the reference for the on-chip synthesizers. To
cover the required frequency range, the integrated Voltage Controlled Oscillator (VCO)
operates at twice the frequency for band 1800/1900/2100, and at four times the desired
frequency for band 800/900. The two synthesizers are controlled through the serial bus
from the access side of the digital baseband controller.
EDGE/GPRS/GSM Transmitter Part
Polar modulation transmitter architecture based on the direct phase/frequency
modulation/synthesizer architecture is implemented for GSM, GPRS and EDGE. This
architecture has the capability of generating both the GSM/GPRS constant envelope GMSK
modulation and the linear EDGE 8-PSK modulation in a very cost efficient way. The
motivation for a polar modulation transmitter architecture compared to traditionally linear
architectures is to reduce the output noise (thus eliminating the need for off-chip filters)
reduce the power consumption by utilizing non-linear switching analog signal processing
blocks, and to eliminate the need for an RF isolator.
In brief, the phase/frequency modulator in this polar modulation architecture is a sigma-
delta controlled fractional-N frequency synthesizer with an additional frequency insertion
point after the loop filter at the input of the VCO. The Phase-locked Loop (PLL) has two
information inputs: the divider ratio in the feedback path and a direct path to the VCO.
The phase locked loop generates the radio frequency carrier including the phase
modulation information at the desired channel frequency.
WCDMA Transmitter Part
The WCDMA transmitter architecture is an on frequency linear direct up-conversion IQ-
modulator. The in-phase and quadrature-phase reconstruction filters are fully integrated
and a programmable gain amplifier implements the gain control. An external SAW filter
between the WCDMA circuit and the power amplifier is used to improve noise performance.
After the power amplifier, the signal is sent through an isolator and through the duplex
filter, which directs the transmit signal to the antenna connector through the antenna
switch. The supply voltage and bias of the power amplifier are adapted depending on the
output power to achieve high efficiency at every transmitter power level. A high efficiency
DC/DC converter regulates the supply voltage and the bias operation point is controlled by
a D/A-converter in the WCDMA radio circuit.
Receiver Part
The receiver architecture is a direct down-conversion zero-IF receiver with integrated low-
pass filters. The complete receiver with seven Low Noise Amplifiers (LNAs), one for each
supported band, is integrated on chip. After the down-conversion, the in-phase and
quadrature-phase components are low pass filtered and if the receiver is in
EDGE/GPRS/GSM mode the signals are fed to the integrated high dynamic range sigma-
delta A/D-converters.
SEMC Troubleshooting Manual
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