CM-42 Technical Description
PAGE 19 OF 38
SEM/CX-02:0076/DES A
The meaning and value of the timing parameters are described in Table 12.
Name
Description
Min
Typical
Max
Unit
PCM_SYNC cycle time.
125
µ
s
t
SYNC
PCM_SYNC frequency
8.0
kHz
t
SYNCA
PCM_SYNC asserted time.
62.4
62.5
µ
s
t
SYNCD
PCM_SYNC de-asserted time.
62.4
62.5
µ
s
t
SU(SYNC)
PCM_SYNC setup time to PCM_CLK rising.
1.95
µ
s
t
H(SYNC)
PCM_SYNC hold time after PCM_CLK falling.
1.95
µ
s
PCM_CLK cycle time.
7.8
µ
s
t
CLK
PCM_CLK frequency
128
kHz
t
CLKH
PCM_CLK high time.
3.8
3.9
µ
s
t
CLKL
PCM_CLK low time.
3.8
3.9
µ
s
t
PDLD
Propagation delay from PCM_CLK rising to
PCM_DLD valid.
50
ns
T
SU(ULD)
PCM_ULD setup time to PCM_CLK falling.
70
ns
T
H(ULD)
PCM_ULD hold time after PCM_CLK falling.
20
ns
Table 12: PCM Timing Parameters
2.3.5 Serial Data Interface
The serial channels are used as asynchronous communication links between the application system and the
module. The following table shows the serial data channels related signals:
Pin
CM-42
Description
Dir
23
DCD
D
ata
C
arrier
D
etect
This signal is set default high. It goes low indicating that a data or fax call is
established (CONNECT received from the remote modem). The signal goes
high when the data connection is disconnected.
O
25
CTS
C
lear
T
o
S
end
This signal is initially set high, indicating that the module is not ready to
receive data. It is set low after the module is done performing its startup
procedure indicating that it is ready to receive data.
O
26
DTR
D
ata
T
erminal
R
eady
This signal should be set high by the application during a data call. A high to
low transition will terminate the data call.
I
27
TD
T
ransmit Serial
D
ata To Module (DTMS)
The application shall set this signal high at startup.
I
28
RTS
R
equest
T
o
S
end
The application shall set this pin low when it is ready to receive data.
I
30
RD
R
eceive Serial
D
ata From Module (DFMS)
The module will set this signal high at startup.
O
Table 13: Serial Data Channels
All the serial-channel-related signals have the same electrical characteristics. In the following table you can see
some of these characteristics.
The common CMOS electrical specifications defined in Section 2.3.2 above are valid for all these signals. The
standard character format is 1 start bit, 8 data bits, non-parity and 1 stop bit. In all, there are 10 bits per character.
