SiTime SiT6502EB, Руководство пользователя

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SiT6502EB HW UM Preliminary Rev 1.0 Page 3 of 33 www.sitime.com
SiT6502EB Evaluation Board (EVB) HW User Manual
Connector Designators Description
Header for internal use only 10-pin Header (J76)
(Default Jumper position see in
Figure A20 )
PullUp vs PullDown switch
Headers 3-pin Headers (J67 through J69, J72 through J74, J75, J81,
JVDD1)
Signals switch Header 3-pin Header (J71)
PLL supply voltage source
switching Header 3-pin Header (J31)
PLL supply voltage levels
switching Header 3-pin Header (J32)
Left supply voltage source
switching Header 3-pin Header (J8)
Left supply voltage levels
switching Header 3-pin Header (J9)
FTDI supply voltages source
switching Header 3-pin Header (J78)
FTDI supply voltage levels
switching Header 3-pin Header (J30)
USB – External Power sources
switching Headers 3-pin Headers (J79, J6)
Outputs supply voltage
source switching Header 3-pin Headers (J10, J77, J14, J16, J18, J20, J22, J24, J26, J28)
Outputs supply voltage levels
switching Header 3-pin Headers (J11, J13, J15, J17, J19, J21, J23, J25, J27, J29)
5
Test Points Descriptions
Table 2 describes all Test Point (TP)s on the EVB.
Table 2. SiT6502EB Test Points description
Connector Designators Description
GND Test Points 1-pin Headers (TP1, TP3, TP4, TP5, TP7)
Reference Clock Test Point 1-pin Header (TP6)
Test Points for internal use only 1-pin Headers (TP2, TP8, J82 through J86)