SiTime SiT6502EB, Руководство пользователя

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SiT6502EB HW UM Preliminary Rev 1.0 Page 2 of 33 www.sitime.com
SiT6502EB Evaluation Board (EVB) HW User Manual
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SiT6502EB Support Collateral
The SiT6502EB Evaluation Board is provided with the following collateral:
- SiT6502EB EVB HW User Manual
- Time Master for Clocks SW
- Time Master for Clocks SW User Manual
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Connectors Descriptions
Table 1 lists the SiT6502EB EVB connectors.
Table 1. SiT6502EB connectors
Connector Designators Description
Power + Control USB Type B connectors (J3) for Device programming and
+5V supply
Power USB Type B connectors (J4) for +5V supply, 2-pin connectors
(J80, J7) for ex5V power supply
Inputs SMA connectors (J35 through J42) for receiving external
clock signals
Outputs SMA connectors (J43 through J62) for synthesized clock
outputs
External FTDI supply 2-pin connector (H13)
Ex3.3V (VDD Left)
Input receiver supply 2-pin connector (H1)
Ex3.3V (VDD PLL)
supply 2-pin connector (H12)
External Output VDD Supply 2-pin connectors (H2 through H11)
Common Mode to GND
Headers in output
terminations 2-pin Headers (JSCL13 through JSCL22)
Output LDO Regulators
Enable Inputs to GND Headers 2-pin Headers (J2, JSCL3 through JSCL11), shorted by default
for LDO outputs enabling
Left Supply LDO Regulators
Enable Inputs to GND Headers 2-pin Headers (J1), shorted by default for LDO outputs
enabling
Header for internal use only 2-pin Header (JSCL 1), shorted by default
Headers for I
2
C bus Pull-up 2-pin Headers (JSCL 2, JSCL 12), shorted by default
Header 1-pin Header (J5)
Header for PLL supply LDO
regulator output Shut Down 2-pin Header (J12)