Examples and register assignments
4.3 Registers
SIMATIC PCIe DIO4
Compact Operating Instructions, 11/2011, A5E03493449-01
23
Bit
Access Name
Default Description
2
RW
IIEN
0
Input interrupt enabled. If "1" and GSR.IIF = 1, GSR.IF is
set.
1
RW
IEN
0
Global interrupt enabled. If "1", interrupts are enabled. If
STATUS.IF = 1, an interrupt is triggered.
0
RW
EN
0
Global enable. Must be set to "1" for normal operation. If
set to "0", all internal registers are reset.
GSR: General Status Register (BASE + 0x0008)
Bit
Access Name
Default Description
31..8
RO
0
Reserved
7
RWC
EIF
0
Error interrupt flag. If "1" an error has occurred. If the bit
is written with "1", the bit is reset.
6..5
RO
0
Reserved
4
RO
CIF
0
Counter interrupt flag. If this flag was set, a counter has
triggered an interrupt. If all enabled counter interrupts are
deleted, the bit is reset.
3
RO
OIF
0
Output interrupt flag. If this flag was set, an output has
triggered an interrupt. If all enabled output interrupts are
deleted, the bit is reset.
2
RO
IIF
0
Input interrupt flag. If this flag was set, an input has
triggered an interrupt. If all enabled input interrupts are
deleted, the bit is reset.
1
RO
IF
0
Interrupt flag. If EIF, CIF, OIF or IIF = 1, the flag is set. All
interrupts must be deleted to delete this bit. If the bit is
set and CONTROL.IEN =1, an interrupt is triggered.
0
RWC
INUSE
0
The bit results in "0" at the first reading of the Global
Status Register GSR. All other read accesses must
result in "1". The DIO is in use.
Use the INUSE flag to prevent several drivers from
accessing the DIO. If the bit is written with "1", the bit is
reset.
Input Register
INP: Input register (BASE + 0x0100)
Bit
Access Name
Default Description
31..0
RO
INx
-
Each bit reflects the corresponding input after filtering
and inversion.
Содержание SIMATIC PCIe DIO4
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