Method of operation
7SV512
V1
34
C53000---G1176---C91
4.2.5 Circuit breaker not fully operational
There may be cases when it is already clear that the
circuit breaker associated with a feeder protection
relay cannot clear a fault, e.g. when the tripping volt-
age or the tripping energy is not available.
In such a case it is not necessary to wait for reaction
of the feeder circuit breaker. If provision has been
made for such a condition to be indicated (e.g. con-
trol voltage monitor or air pressure monitor), the
monitor alarm signal can be fed to the binary input
”
>CB defect
” of the 7SV512. On occurrence of this
alarm and trip command of the feeder protection, a
separate timer T3---BR---DEF is started (Figure
4.14), which is normally set to 0. Thus, the neigh-
bouring circuit breakers (bus-bar) are tripped imme-
diately in case the feeder circuit breaker is not opera-
tional.
&
T3---
BR---DEF
>CB defect
all start con-
ditions acc.
Fig 4.13
BFP CB
defTrip
>1
(see Fig
4.13)
Figure 4.14 Circuit breaker defective
4.2.6 Transfer trip to the remote end circuit breaker
7SV512 provides facility to give an additional inter-
trip signal to the circuit breaker of the remote line
end in case the local feeder circuit breaker fails. For
this, a suitable protection signal transmission link is
required (e.g. via communication cable, power line
carrier transmission, radio wave transmission, or op-
tical fibre transmission).
The output command ”
BFP TransTrip
”, which
can be allocated to a command output of the device,
is suitable to control the transmitter. This command
appears always when the bus-bar trip command
”
BFP Trip BB
” is generated, i.e. after expiry of the
second time stages T2, or at bus-bar trip during de-
fective circuit breaker.
4.2.7 Hardware supervision and blocking
Because of the high safety demand for the breaker
failure protection, 7SV512 comprises special moni-
toring features.
Besides dual channel control with additional release
channel, which are usual for all trip relays of Sie-
mens numerical protection relays, a special trip re-
lease module is provided for two of the trip relays.
This hardware logic module operates independent
of the processor system but informs the processor
system about its operation. By this means, the pro-
cessor system on the one hand, and the hardware
trip release module on the other hand, can super-
vise each other.
The trip release module and its surroundings are
shown in Figure 4.15. The plug jumpers Pl1 to Pl5
are shown in the position which is recommended for
7SV512 (factory settings).
The trip release module has three inputs and two
outputs. The binary inputs of the device, BI 8, BI 9,
and BI 10, are hard-wired with the three inputs of the
trip release module. This is why the functions of
these binary inputs should remain assigned in the
shown manner. The outputs of the module provide
additional hardware release signals for the trip re-
lays K1 and K2.
The binary input signals are combined such that
three release signals are generated:
Rel1 = BI 10 & BI 9 & BI 8
Rel0 = BI 10 & BI 9 & BI 8
Rel2 = BI 10 & BI 8
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