B. Operation panel section
(1) General
The operation circuit is composed of the display matrix circuit and the
key matrix circuit.
LED
display:
Turns on each LED with DSEG0
∼
DSEG7 and
MDL0
∼
MDL4 signals.
By turning on/off signals DSEG0
∼
DSEG7 according to timing of
MDL0
∼
MDL4, the LED display at the intersection point of matrix is
turned on.
Key
detection:
Key detection is made by the signal matrix of
DSEG0
∼
DSEG7 and K10
∼
K11.
When all the MDL signals are off during switching of the MDL signals,
DSEG0
∼
DSEG7 are selected. By turning on the transistor at the last
step in the main PWB when the key is pressed, the input state of K10
or K11 is judged to detect ON/OFF of the key.
For selection of DSEG, two signals are switched at one time during
MDL is off.
(2) Display circuit section
This circuit is controlled by the data signal and the control signal from
the main control signal.
<Block diagram>
C. DC power operational description
(1) General
When the specified AC input is applied to this power, two DC vol-
tages of +24V (VB) and +14V (V8S) are provided. (V8S is made to
BV stabilization power by the 3-terminal regulator in the main PWB.)
The DC power employs the pseudo-resonance self-excitement
flyback convertor system with the hybrid IC STR-F6514 (100V series)
and STR-F6523 (200V series).
Fig. 1 shows the block diagram of the power section.
DSEG0
DSEG1
DSEG2
DSEG3
DSEG7
30µ sec
MDL0
MDL1
MDL4
2msec
MDL
DSEG0
KI1
DSEG1
KI0
50µ sec
30µ sec
(1UPK ON)
(CRSK ON)
DSEG0
DSEG1
DSEG2
DSEG3
DSEG4
DSEG5
DSEG6
MDL0
MDL1
MDL2
MDL3
MDL4
KI0
KI1
IR2C07
IC101
CPU
DSEG7
C107
ULN2003
8V
Q208
DTA143ZKA
8V
IC106
Connector
harness
CN802
803
AC filer
F802
Rectifying
/smoothing
Main switch
control
IC802
ON/OFF
circuit
Rectifying
/smoothing
Rectifying
/smoothing
F801
/SWPEN
ON/OFF
signal
VBS
+14V
non-stabilizing
line
VB
+24V line
Connector CN801
12 – 12
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Published in Heiloo, Holland.