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PHOLD is designed in order to protect power off by the
manual operation of the AC switch, so this signal is not
effective for the stop of power supply due to power cut etc.
Bit 4:
SLEEP=0 Operation Mode The power fan turns and the
power source of LCD back
light is connected.
SLEEP=1
Sleep
Mode The power fan stops and the
power source of LCD back light is
disconnected.
Note:
*
UP-5300 must be always used under SLEEP=0.
Bit 3-2:
Not used.
Bit 1:
Register sensing the status of AC switch
PHSNS="0": The AC switch is turned OFF.
PHSNS="1": The AC switch is turned ON.
Bit 0:
UP-5300 is not used (whether the CPU cooler motor is
locked or not is sensed).
(MLOCK=0: The motor is running.)
(MLOCK=1: The motor is not running.)
20-4. Shutdown Control
The power switch of UP-5300 is used to switch the ON state and
stand-by state of terminal.
When starting up the terminal, the power switch is necessary to be
set ON. When the power switch is set to the position of stand-by
mode, the power source unit stops automatically. If HOP1 pin of the
PSC2 is held (PHOLD=1) by the software, the power source unit
continues to run until the software releases this holding.
If the software can not control shutdown, turning ON the shutdown
switch on the side panel can force stand-by mode to be released.
However, when the power switch is set ON, turning ON the shutdown
switch does not stop the power source unit.
21. Vacuum Fluorescent Display (VFD)
21-1. UP-P20DP/I20DP
21-2. Outline
Content of display: 5
×
7 dots (20 digits
×
2 lines) + comma
+
é
PSC2 internal UART4 is used as COM8.
(RS-232C level I/F, serial, 8 bits, non-parity, 1 stop-bit, 9600 bps, and
RXD/DSR/DTR)
When powering on, the
é
mark blinks automatically.
21-3. VFD Control
The UART4 incorporated in the PSC2 as Mega Macro Function is
used. The I/O address of this interface is PSC2+(808h-80Fh)=988h-
98Fh.
21-4. Connector Specifications
RJ45 (for UP-P20DP)
Pin No.
Signal
Function
I/O
1
+5V
+5V
—
2
ER
Data terminal Ready
O
3
SD
Send Data
O
4
SG
Signal Ground
—
5
SG
Signal Ground
—
6
(NC)
(Not Connected)
7
DR
Data set Ready
I
8
+5V
+5V
O
Connector (for UP-I20DP)
Pin No.
Signal
Function
I/O
1
SG
Signal Ground
—
2
SG
Signal Ground
—
3
SD
Send Data
O
4
ER
Data terminal Ready
O
5
DR
Data set Ready
I
6
+5V
+5V
—
7
+5V
+5V
—
21-5. Cautions
UP-P20DP and UP-I20DP can not be used simultaneously with in-
stalled on the same system because of their power capacity.
22. Drawer
22-1. Outline
ER-03DW and ER-04DW, supports 2 channels but only one drive is
supported at a time.
The time in which the drawer is driven by the PSC2 is 45ms.
Time elapsed since the drawer is driven by the PSC2 until DS signal
becomes active (sense active time) is 200ms.
Drive shutdown feature depending on detecting power cut in the
PSC2.
22-2. Drawer Control
22-3. Timing Chart
23. Magnetic Card Reader (MCR)
23-1. Outline
UP-E12MR2 is the suggested MCR.
UP-E12MR2 supports 2 channels of MCR interface. These 2 chan-
nels can be read simultaneously.
96 bytes of FIFO is incorporated in each channel.
23-2. Card Read Operation
1) The MCR interface goes into the status of waiting for reading a
card after the following settings are performed by the main CPU.
(1)
Setting a mode:
Sets a mode corresponding to the standard of the handled
card (JBA/ABA/IATA).
(2)
Setting a start mark:
Sets a start mark corresponding to the standard of the card.
(3)
Resetting the interrupt:
Resets the interrupt because no card can be read when any
interrupt is active.
2) After a card is scanned, the MCR interface changes serial data of
the MCR to parallel data. Changed data is written in the FIFO
buffer at every character in order from the start mark to the LRC.
The FIFO buffer has the capacity of 96 bytes, and the number of
characters in a card corresponding to each standard is as follows:
JBA (JIS 2 type): 72 characters maximum (8 bits a character)
ABA (JIS 2 type second track): 40 characters maximum (5
bits a character)
Max.50us
Max.50us
45ms
Max.200ms
Solenoid ON
DR0-DR1
DS
Detection
Delay
Drawer Open
Completed
Drawer manually
close
5 – 39
Содержание UP-5300
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