Sharp ER-A570, Руководство по обслуживанию

Страница: 56 / 73

3) Pin Configuration (top view)
Fig. 26
7. Modulator/Demodulatro circuit
Phase encoding (PE) modulation is used for SRN communications.
The PE modulation has a changing point in the signal at the center of
the bit, the timing signal is regenerated from this signal, making the
modulation and demodulation simpler by providing continuous signals
for the DC conponents.
Fig. 27 PE Modulation
Serial send data applied from the ADLC to TXD (pin 72) of the
MB62H149 and the TXC synchronization signal is subject to PE
modulation. The resulting signal is output through TDI (pin 67) of the
MB62H149 to the transmission driver.
Received data is applied from the receiver to RDI (pin 66) of the
MB62H149, where it is demodulated into serial receive data and
synchronization clock. They are output to the ADLC through RXS (pin
70) and RXC (pin 69), respectively.
The modulator and demodulator are located within the MB62H149.
8. Transmitter and Receiver Circuits
1) Transmitter
The modulated send data output through TDI (pin 67) of the
MB62H149 is controlled by the RTS (Request to Send) signal
transferred from the ADLC during transmission.
The TDI is NAND’ed with RTS, so that data transmission is disabled
when the RTS is high.
RTS is Low state during transmission and Transistor Q2 is turned ON.
When transmitting data "1", the output at pin 12 of the NAND gate
(IC7) is set Low. (the RTS is Low) Since pin 11
of the following transistor (IC7) is set Low, it is turned off.
When hte RTS is set Low, transistor Q1 turned on through an inverter,
which applies a bese current to Q2, turnit it on. When Q2 and pins 10
and 9 of IC7 are turned on, the output transistors IC7 (pins 6 and 5)
are turned on. Since the output trasistors are common-emitter circuit,
data "1" is obtained at LINE.
Fig. 28
2) Receiver
The receiver provides the following two functions:
1) Data reception
2) Collision detection
Fig. 16-29
1
Data reception
The 75115 is a dual-channel receiver containing two comparators.
One of the comparators is used to detect received data (RDI). The
data received from the line is applied to the negative input (pin 5)
of the comparator. The received data is also amplified by Q3,
integrated by R15 and C32, and voltage-divided by R17 and VR1
before being applied to the positive input (pin 7) of the same
comparator, This assures reliable identification of "0" and "1"
levels even if the received data signal is distorted due to a lond
line length.
Note: If Transistor Q1 is replaced for servicing, the VR1 requires
readjustment. See the section for adjustment.
CTS
DCD
DTR/LOC
FD
TDSR
RDSR
D0
D1
D2
D3
D4
D5
D6
D7
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
VSS
RTS
RXD
RXC
TXC
TXD
IRQ
RESET
CS
RS0
RS1
R/W
E
VCC
Data
NRZ
PE
0 1 1 0 0 1 1 0
+12V
+5V
Transmitter
LINE
GND
CO L
RDI
14
15
13
9
11
R23
1.2K
Q3
R15 3.9K
R16
1K
C32 3300P
R17
1.5K
VR1
2
1
7
8
+5V
12K
RTS
75115
3 4
R28
15K
+12V
Transmit data
20K
SN75450BN
LINE
GND
R1
15
R10
220
4
5
6
IC7
+12V
R20
820
R3
1K
R22
560
Q1 4
74HC04
1
13
12
7
SN75450 BN
RTS
TDI
11
10
9
R24
220
R25
470
+5V
IC7
RTS
TDI
Q2
4  13