SEPTENTRIO mosaic Series, Руководство по оборудованию

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Pinout and I/O Description
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Note the timing signals use 1.8V logic. If 3.3V logic would be required, the EVENT-signals
can be generated via a resistive divider, considering the integrated pull-down (see 3.4.2).
They could as well be created via a level shifter, using the 1V8_OUT output from the
module to supply the module side.
4.9 PPS output
Pin Name Type Level Description Comment
PPSO O 1V8_LVTTL PPS output. Max output current: 10 mA. Polarity and rate user
selectable. During start up, this pin is in high-Z mode.
See Reference Guide for operating instructions.
Default pulse duration: 5ms.
The polarity, frequency and pulse width can be set with the
setPPSParameters
command.
The PPSO signal uses 1.8V logic. It can be level-shifted if 3.3V logic is required (e.g. with
SN74AVC4T245RSV).
The PPSO signal is briefly driven high during startup of the module (for about 1 ms), then
gets high-impedant while the module is starting up. It finally gets driven to the intended
level (low or high depending on the user-selected PPS polarity) after a few seconds. If this
start-up behavior is undesirable, it can be shielded by a buffer (or level shifter) with an
output enable. The output enable can be controlled with the MODULE_RDY pin of the
module. The MODULE_RDY signal gets high about 300ms after applying power to
VDD_3V3. The input and output of the buffer should be pulled-up or pulled-down
depending on the desired inactive state of the PPSO signal.
4.10 General Purpose Output (GPx)
The GP1 and GP2 pins are general purpose digital outputs, of which the level can be
programmed with the
setGPIOFunctionality command.
Pin Name Type Level Description Comment
GP1 O 3V3_LVTTL General purpose output. GP1 in setGPIOFunctionality command.
GP2 O 3V3_LVTTL General purpose output. GP2 in setGPIOFunctionality command.