RTD Embedded Technologies, Inc.
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v
ERES35105
User’s Manual
6.1.3
2-Wire LVDT Input
23
Input Connections
23
Jumper Configuration
23
6.1.4
3-Wire LVDT Input
24
Input Connections
24
Jumper Configuration
24
6.1.5
Direct Input
25
Input Connections
25
Jumper Configuration
25
Reference Input ........................................................................................................................................................................ 26
6.2.1
Internally Generated Reference
26
Connections
26
Jumper Configuration
26
6.2.2
Differential Externally Generated Reference
27
Connections
27
Jumper Configuration
27
6.2.3
Single-Ended Externally Generated Reference
27
Connections
27
Jumper Configuration
27
7
Register Address Space
28
Identifying the Board ................................................................................................................................................................. 28
Index and Data Registers ......................................................................................................................................................... 28
7.2.1
GPIOAB_CTRL (Read/Write)
28
7.2.2
GPIOCD_CTRL (Read/Write)
28
7.2.3
SELECT (Read/Write)
28
7.2.4
INDEX_DATA (Read/Write)
29
Accessing the Board Registers ................................................................................................................................................. 29
7.3.1
Reading from a Board Register
29
7.3.2
Writing to a Board Register
30
7.3.3
Reading Shift Register Status
31
Board Registers ........................................................................................................................................................................ 31
7.4.1
BUILD_NUM_LS, BUILD_NUM_MS (Read-Only)
31
7.4.2
SR_SELECT (Read/Write)
31
7.4.3
SR_DATA_OUT (Read/Write)
32
7.4.4
SR_DATA_IN (Read-Only)
32
7.4.5
CHx_SETUP_STATUS (Read/Write, Read-Only)
32
7.4.6
CHx_POSITION (Read-Only)
32
Shift Register ............................................................................................................................................................................ 33
7.5.1
Performing a Shift Register Command
33
7.5.2
Channel x Mode (0x00 and 0x02)
33
Output Data
33
Input Data
33
Modes
34
7.5.3
Channel x Velocity Trim (0x01 and 0x03)
34
Output Data
34
Input Data
34
7.5.4
Excitation Frequency (0x04)
35
Output Data
35
Input Data
35
7.5.5
Excitation Amplitude (0x05)
35
Output Data
35
Input Data
35
8
Troubleshooting
36
9
Additional Information
37
PC/104 Specifications ............................................................................................................................................................... 37
PCI and PCI Express Specification .......................................................................................................................................... 37
10
Limited Warranty
38